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plat/marvell/armada: postpone MSS CPU startup to BL31 stage
Konstantin Porotchkin authored 
Normally the CP MSS CPU was started at the end of FW load to IRAM at BL2.
However, (especailly in secure boot mode), some bus attributes should be
changed from defaults before the MSS CPU tries to access shared resources.
This patch starts to use CP MSS SRAM for FW load in both secure and
non-secure boot modes.
The FW loader inserts a magic number into MSS SRAM as an indicator of
successfully loaded FS during the BL2 stage and skips releasing the MSS
CPU from the reset state.
Then, at BL31 stage, the MSS CPU is released from reset following the
call to cp110_init function that handles all the required bus attributes
configurations.

Change-Id: Idcf81cc350a086835abed365154051dd79f1ce2e
Signed-off-by: default avatarKonstantin Porotchkin <kostap@marvell.com>
Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/boot/atf/+/46890

Tested-by: default avatarsa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
b5a06637
Name Last commit Last update
bl1 Add support for FEAT_MTPMU for Armv8.6
bl2 Add support for FEAT_MTPMU for Armv8.6
bl2u linker_script: move .data section to bl_common.ld.h
bl31 Add TRNG Firmware Interface service
bl32 bl32: Enable TRNG service build
common fdt: Use proper #address-cells and #size-cells for reserved-memory
docs plat/marvell/armada: allow builds without MSS support
drivers plat/marvell/armada: allow builds without MSS support
fdts tc0: update GICR base address
include Merge changes from topic "scmi_v2_0" into integration
lib Merge "lib/cpu: Workaround for Cortex A77 erratum 1946167" into integration
make_helpers tbbr-tools: enable override TRUSTED_KEY_CERT
plat plat/marvell/armada: postpone MSS CPU startup to BL31 stage
services services: spm_mm: Use sp_boot_info to set SP context
tools fiptool: Do not call 'make clean' in 'all' target
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch
.editorconfig .editorconfig: set max line length to 100
.gitignore tools: renesas: Add tool support for RZ/G2 platforms
.gitreview Specify integration as the default branch for git-review
Makefile Merge "fiptool: Do not print duplicate verbose lines about building fiptool" into integration
dco.txt Drop requirement for CLA in contribution.md
license.rst doc: De-duplicate readme and license files
readme.rst doc: Formatting fixes for readme.rst
readme.rst

Trusted Firmware-A

Trusted Firmware-A (TF-A) is a reference implementation of secure world software for Arm A-Profile architectures (Armv8-A and Armv7-A), including an Exception Level 3 (EL3) Secure Monitor. It provides a suitable starting point for productization of secure world boot and runtime firmware, in either the AArch32 or AArch64 execution states.

TF-A implements Arm interface standards, including:

The code is designed to be portable and reusable across hardware platforms and software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A with reference implementations of Arm standards to benefit developers working with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration testing, on any secure world code derived from TF-A.

More Info and Documentation

To find out more about Trusted Firmware-A, please view the full documentation that is available through trustedfirmware.org.

Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.