Tegra186: reset CPU power state info while onlining
Varun Wadekar authored
This patch resets the CPU power state info when we online any CPU. The
NS world software would re-init the CPU power state after the CPU gets
online anyways. This allows us to maintain proper CPU/cluster power
states in the MCE firmware at all times.

Change-Id: Ib24054f53df720a4f88d67b2cb5a2e036e475e14
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
b8de8473
Name Last commit Last update
bl1 Introduce unified API to zero memory
bl2 Introduce unified API to zero memory
bl2u Introduce unified API to zero memory
bl31 Merge pull request #860 from jeenu-arm/hw-asstd-coh
bl32 Merge pull request #860 from jeenu-arm/hw-asstd-coh
common Simplify translation tables headers dependencies
docs Add workaround for ARM Cortex-A53 erratum 855873
drivers Merge pull request #861 from soby-mathew/sm/aarch32_fixes
fdts Fix incorrect copyright notices
include Add workaround for ARM Cortex-A53 erratum 855873
lib Add workaround for ARM Cortex-A53 erratum 855873
make_helpers build: Define build option for hardware-assisted coherency
plat Tegra186: reset CPU power state info while onlining
services spd: trusty: support for AARCH64 mode
tools fiptool: Embed a pointer to an image within the image descriptor
.checkpatch.conf Mandate 'Signed-off-by' line in commit messages
.gitignore gitignore: ignore GNU GLOBAL tag files
Makefile Merge pull request #860 from jeenu-arm/hw-asstd-coh
acknowledgements.md Add Xilinx to acknowledgements file
contributing.md Drop requirement for CLA in contribution.md
dco.txt Drop requirement for CLA in contribution.md
license.md Update year in copyright text to 2014
readme.md readme.md: Add tested Linaro release information for FVPs