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Rodrigo Vivi authored
Following additions: 1. The DE_RRMR and DE_GUCRMR register bits are set before the restore of the registers to mask the flip done, etc. Once all the registers are restored, these registers are restored. 2. The pipe interrupt registers are restored only after the plane has been enabled. 3. Naming of the file changed from .5 to .16 to make it two decimal points for increased number of versions that can be supported. 4. DC 5 and 6 count locations are in the below mentioned offsets DC3_DC5_COUNT 80030 DC5_DC6_COUNT 8002C Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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