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  1. 03 Sep, 2015 1 commit
  3. 20 Aug, 2015 6 commits
  5. 14 Aug, 2015 1 commit
  7. 12 Aug, 2015 2 commits
  9. 22 Jul, 2015 1 commit
  11. 16 Jul, 2015 3 commits
  13. 14 Jul, 2015 7 commits
  15. 20 Jun, 2015 1 commit
    • Rodrigo Vivi's avatar
      linux-firmware: New minor DMC release for Skylake - ver1_18 · a750f4ee
      Rodrigo Vivi authored 
      

Following additions:
1. No changes to the FW program itself
2. CSS header size field was fixed
3. DMCheader length field is mentioned in dwords instead of bytes
4. Date field is fixed in header.
4. Fixed the DMC Header.HeaderLen issue. The HeaderLen is specified in bytes instead of dwords.
6. DC 5 and 6 count locations are in the below mentioned offsets - same as ver1.16
DC3_DC5_COUNT                  80030
DC5_DC6_COUNT                  8002C
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      a750f4ee
  17. 18 Jun, 2015 1 commit
  19. 05 Jun, 2015 4 commits
    • Rodrigo Vivi's avatar
      linux-firmware: New minor DMC release for Skylake. · 5a7595e8
      Rodrigo Vivi authored 
      

Following additions:
1. The DE_RRMR and DE_GUCRMR register bits are set before the restore of
the registers to mask the flip done, etc. Once all the registers are
restored, these registers are restored.
2. The pipe interrupt registers are restored only after the plane has
been enabled.
3. Naming of the file changed from .5 to .16 to make it two decimal
points for increased number of versions that can be supported.
4. DC 5 and 6 count locations are in the below mentioned offsets
DC3_DC5_COUNT                  80030
DC5_DC6_COUNT                  8002C
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      5a7595e8
    • Rodrigo Vivi's avatar
      linux-firmware: Add i915 DMC firmware for Broxton · d8d78870
      Rodrigo Vivi authored 
      

DMC provides additional graphics low-power idle states. It provides
capability to save and restore display registers across these
low-power states independently from the OS/Kernel.

This is the first release of DMC firmware for Broxton platforms.

bxt_dmc_ver1.bin is a symbolik link to latest recommended minor
release.
This major version will be just upgraded on code when it is required
software changes for API/ABI compatibility.
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      d8d78870
    • Rodrigo Vivi's avatar
      linux-firmware: Add i915 GuC firmware · 4e279504
      Rodrigo Vivi authored 
      

GuC is designed to perform graphics workload scheduling on the various
graphics parallel engines. In this scheduling model, host software
submits work through one of the 256 graphics doorbells and this invokes
the scheduling operation on the appropriate graphics engine. Scheduling
operations include determining which workload to run next, submitting a
workload to a command streamer, pre-empting existing workloads running
on an engine, monitoring progress and notifying host SW when work is
done.

This is the first release of GuC firmware for Skylake platforms.

skl_guc_ver1.bin is a symbolik link to latest recommended minor release.
This major version will be just upgraded on code when it is required
software changes for API/ABI compatibility.
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      4e279504
    • Rodrigo Vivi's avatar
      linux-firmware: Add i915 DMC firmware · b693dacc
      Rodrigo Vivi authored 
      

DMC provides additional graphics low-power idle states. It provides
capability to save and restore display registers across these low-power
states independently from the OS/Kernel.

This is the first release of DMC firmware for Skylake platforms.

skl_dmc_ver1.bin is a symbolik link to latest recommended minor release.
This major version will be just upgraded on code when it is required
software changes for API/ABI compatibility.
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      b693dacc
  21. 13 May, 2015 6 commits
  23. 10 May, 2015 1 commit
  25. 08 May, 2015 6 commits