Commit 09f55fe1 authored by Siarhei Siamashka's avatar Siarhei Siamashka
Browse files

fel-to-spl-thunk.S: Fix safety guard which checks for enabled cache



The exit code path after detecting that the cache is enabled does not
need to swap FEL stacks and backup buffers. This way we get the error
actually reported by the 'fel' tool instead of the device getting
locked up.

The thunk code refuses to work if the caches are enabled because
we don't want to deal with the instructions/data cache coherency
yet. The caches are initially in a disabled state upon activating
FEL mode on all currently known Allwinner processors.
Signed-off-by: default avatarSiarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: default avatarHans de Goede <hdegoede@redhat.com>
parent a77635f5
......@@ -158,7 +158,7 @@ cache_is_unsupported:
movw TMP1, (('?' << 8) + '.')
movt TMP1, (('?' << 8) + '?')
str TMP1, [BUF1, #8]
b return_to_fel
b return_to_fel_noswap
checksum_is_bad:
/* The checksum test failed, so change 'eGON.BT0' -> 'eGON.BAD' */
......@@ -169,6 +169,7 @@ checksum_is_bad:
return_to_fel:
bl swap_all_buffers
return_to_fel_noswap:
pop {TMP1, lr}
msr cpsr_c, TMP1 /* Restore the original CPSR */
ldr sp, [sp]
......
......@@ -57,7 +57,7 @@
0xe3032f2e, /* e0: movw r2, #16174 */
0xe3432f3f, /* e4: movt r2, #16191 */
0xe5802008, /* e8: str r2, [r0, #8] */
0xea000003, /* ec: b 100 <return_to_fel> */
0xea000004, /* ec: b 104 <return_to_fel_noswap> */
0xe3a00000, /* f0: mov r0, #0 */
0xe304222e, /* f4: movw r2, #16942 */
0xe3442441, /* f8: movt r2, #17473 */
......
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