Commit 275827ad authored by Siarhei Siamashka's avatar Siarhei Siamashka
Browse files

fel: Enable the SMC workaround for H3/H5/A64/H64



Use a hardwired L.NOP instruction from the OpenRISC reset
vector as a way to check if the workaround is necessary.
Because these L.NOP instructions are guaranteed to be there
and are read-only, this is the most reliable non-invasive test.

Reading SID would be less reliable because it is one-time
programmable and theoretically may be set to zero on some boards.
Signed-off-by: default avatarSiarhei Siamashka <siarhei.siamashka@gmail.com>
parent 8c45b33e
...@@ -148,6 +148,8 @@ soc_info_t soc_info_table[] = { ...@@ -148,6 +148,8 @@ soc_info_t soc_info_table[] = {
.sid_base = 0x01C14000, .sid_base = 0x01C14000,
.sid_offset = 0x200, .sid_offset = 0x200,
.rvbar_reg = 0x017000A0, .rvbar_reg = 0x017000A0,
/* Check L.NOP in the OpenRISC reset vector */
.needs_smc_workaround_if_zero_word_at_addr = 0x40004,
},{ },{
.soc_id = 0x1639, /* Allwinner A80 */ .soc_id = 0x1639, /* Allwinner A80 */
.name = "A80", .name = "A80",
...@@ -175,6 +177,8 @@ soc_info_t soc_info_table[] = { ...@@ -175,6 +177,8 @@ soc_info_t soc_info_table[] = {
.sid_base = 0x01C14000, .sid_base = 0x01C14000,
.sid_offset = 0x200, .sid_offset = 0x200,
.sid_fix = true, .sid_fix = true,
/* Check L.NOP in the OpenRISC reset vector */
.needs_smc_workaround_if_zero_word_at_addr = 0x40004,
},{ },{
.soc_id = 0x1681, /* Allwinner V3s */ .soc_id = 0x1681, /* Allwinner V3s */
.name = "V3s", .name = "V3s",
...@@ -193,6 +197,8 @@ soc_info_t soc_info_table[] = { ...@@ -193,6 +197,8 @@ soc_info_t soc_info_table[] = {
.sid_base = 0x01C14000, .sid_base = 0x01C14000,
.sid_offset = 0x200, .sid_offset = 0x200,
.rvbar_reg = 0x017000A0, .rvbar_reg = 0x017000A0,
/* Check L.NOP in the OpenRISC reset vector */
.needs_smc_workaround_if_zero_word_at_addr = 0x40004,
},{ },{
.soc_id = 0x1701, /* Allwinner R40 */ .soc_id = 0x1701, /* Allwinner R40 */
.name = "R40", .name = "R40",
......
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