fel: Enable MMU on Allwinner-H3 to improve FEL transfer speed

When the CPU clock speed is set to 480 MHz by the U-Boot SPL,
the performance of 'sunxi-fel write' transfers to DRAM improves
from ~95 KB/s to ~510 KB/s.

When the CPU clock speed is set to 1008 MHz by the U-Boot SPL,
the performance of 'sunxi-fel write' transfers to DRAM improves
from ~180 KB/s to ~510 KB/s.

This means that the CPU is not a bottleneck for FEL transfers
anymore. Further performance improvements are possible by
increasing the AHB1 clock speed in the U-Boot SPL (up to
something like ~900 KB/s).
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Peter Korsgaard <peter@korsgaard.com>

fel.c

@@ -486,6 +486,7 @@ soc_sram_info soc_sram_info_table[] = {
 	{
 		.soc_id       = 0x1680, /* Allwinner H3 */
 		.scratch_addr = 0x2000,
+		.mmu_tt_addr  = 0x44000,
 		.thunk_addr   = 0x46E00, .thunk_size = 0x200,
 		.swap_buffers = a31_sram_swap_buffers,
 	},