Merge pull request #1126 from robertovargas-arm/psci-v1.1

Update PSCI to v1.1

docs/firmware-design.rst

@@ -886,10 +886,10 @@ Power State Coordination Interface
 
 TODO: Provide design walkthrough of PSCI implementation.
 
-The PSCI v1.0 specification categorizes APIs as optional and mandatory. All the
-mandatory APIs in PSCI v1.0 and all the APIs in PSCI v0.2 draft specification
+The PSCI v1.1 specification categorizes APIs as optional and mandatory. All the
+mandatory APIs in PSCI v1.1, PSCI v1.0 and in PSCI v0.2 draft specification
 `Power State Coordination Interface PDD`_ are implemented. The table lists
-the PSCI v1.0 APIs and their support in generic code.
+the PSCI v1.1 APIs and their support in generic code.
 
 An API implementation might have a dependency on platform code e.g. CPU\_SUSPEND
 requires the platform to export a part of the implementation. Hence the level
@@ -898,9 +898,9 @@ platform port as well. The Juno and FVP (all variants) platforms export all the
 required support.
 
 +-----------------------------+-------------+-------------------------------+
-| PSCI v1.0 API               | Supported   | Comments                      |
+| PSCI v1.1 API               | Supported   | Comments                      |
 +=============================+=============+===============================+
-| ``PSCI_VERSION``            | Yes         | The version returned is 1.0   |
+| ``PSCI_VERSION``            | Yes         | The version returned is 1.1   |
 +-----------------------------+-------------+-------------------------------+
 | ``CPU_SUSPEND``             | Yes\*       |                               |
 +-----------------------------+-------------+-------------------------------+
@@ -936,6 +936,12 @@ required support.
 +-----------------------------+-------------+-------------------------------+
 | ``PSCI_STAT_COUNT``         | Yes\*       |                               |
 +-----------------------------+-------------+-------------------------------+
+| ``SYSTEM_RESET2``           | Yes\*       |                               |
++-----------------------------+-------------+-------------------------------+
+| ``MEM_PROTECT``             | Yes\*       |                               |
++-----------------------------+-------------+-------------------------------+
+| ``MEM_PROTECT_CHECK_RANGE`` | Yes\*       |                               |
++-----------------------------+-------------+-------------------------------+
 
 \*Note : These PSCI APIs require platform power management hooks to be
 registered with the generic PSCI code to be supported.

docs/platform-migration-guide.rst

@@ -158,6 +158,17 @@ for the ``plat_psci_ops`` structure which is declared as :
         int (*validate_ns_entrypoint)(unsigned long ns_entrypoint);
         void (*get_sys_suspend_power_state)(
                         psci_power_state_t *req_state);
+        int (*get_pwr_lvl_state_idx)(plat_local_state_t pwr_domain_state,
+                                    int pwrlvl);
+        int (*translate_power_state_by_mpidr)(u_register_t mpidr,
+                                    unsigned int power_state,
+                                    psci_power_state_t *output_state);
+        int (*get_node_hw_state)(u_register_t mpidr, unsigned int power_level);
+        int (*mem_protect_chk)(uintptr_t base, u_register_t length);
+        int (*read_mem_protect)(int *val);
+        int (*write_mem_protect)(int val);
+        int (*system_reset2)(int is_vendor,
+                                int reset_type, u_register_t cookie);
     } plat_psci_ops_t;
 
 The description of these handlers can be found in the `Porting Guide <porting-guide.rst#user-content-function--plat_setup_psci_ops-mandatory>`__.

docs/porting-guide.rst

@@ -2271,6 +2271,44 @@ appropriate.
 Implementations are not expected to handle ``power_levels`` greater than
 ``PLAT_MAX_PWR_LVL``.
 
+plat\_psci\_ops.system\_reset2()
+................................
+
+This is an optional function. If implemented this function is
+called during the ``SYSTEM_RESET2`` call to perform a reset
+based on the first parameter ``reset_type`` as specified in
+`PSCI`_. The parameter ``cookie`` can be used to pass additional
+reset information. If the ``reset_type`` is not supported, the
+function must return ``PSCI_E_NOT_SUPPORTED``. For architectural
+resets, all failures must return ``PSCI_E_INVALID_PARAMETERS``
+and vendor reset can return other PSCI error codes as defined
+in `PSCI`_. On success this function will not return.
+
+plat\_psci\_ops.write\_mem\_protect()
+....................................
+
+This is an optional function. If implemented it enables or disables the
+``MEM_PROTECT`` functionality based on the value of ``val``.
+A non-zero value enables ``MEM_PROTECT`` and a value of zero
+disables it. Upon encountering failures it must return a negative value
+and on success it must return 0.
+
+plat\_psci\_ops.read\_mem\_protect()
+.....................................
+
+This is an optional function. If implemented it returns the current
+state of ``MEM_PROTECT`` via the ``val`` parameter.  Upon encountering
+failures it must return a negative value and on success it must
+return 0.
+
+plat\_psci\_ops.mem\_protect\_chk()
+...................................
+
+This is an optional function. If implemented it checks if a memory
+region defined by a base address ``base`` and with a size of ``length``
+bytes is protected by ``MEM_PROTECT``.  If the region is protected
+then it must return 0, otherwise it must return a negative number.
+
 Interrupt Management framework (in BL31)
 ----------------------------------------
 

include/lib/psci/psci.h

@@ -151,7 +151,7 @@
  * PSCI version
  ******************************************************************************/
 #define PSCI_MAJOR_VER		(U(1) << 16)
-#define PSCI_MINOR_VER		U(0x0)
+#define PSCI_MINOR_VER		U(0x1)
 
 /*******************************************************************************
  * PSCI error codes

lib/psci/psci_private.h

@@ -90,7 +90,8 @@
 			define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64) |	\
 			define_psci_cap(PSCI_STAT_RESIDENCY_AARCH64) |	\
 			define_psci_cap(PSCI_STAT_COUNT_AARCH64) |	\
-			define_psci_cap(PSCI_SYSTEM_RESET2_AARCH64))
+			define_psci_cap(PSCI_SYSTEM_RESET2_AARCH64) |	\
+			define_psci_cap(PSCI_MEM_CHK_RANGE_AARCH64))
 
 /*
  * Helper macros to get/set the fields of PSCI per-cpu data.