- 21 Oct, 2019 2 commits
-
-
Soby Mathew authored
-
Soby Mathew authored
-
- 18 Oct, 2019 3 commits
-
-
Artsem Artsemenka authored
The WARMBOOT_ENABLE_DCACHE_EARLY allows caches to be turned on early during the boot. But the xlat_change_mem_attributes_ctx() API did not do the required cache maintenance after the mmap tables are modified if WARMBOOT_ENABLE_DCACHE_EARLY is enabled. This meant that when the caches are turned off during power down, the tables in memory are accessed as part of cache maintenance for power down, and the tables are not correct at this point which results in a data abort. This patch removes the optimization within xlat_change_mem_attributes_ctx() when WARMBOOT_ENABLE_DCACHE_EARLY is enabled. Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: I82de3decba87dd13e9856b5f3620a1c8571c8d87
-
Paul Beesley authored
-
Paul Beesley authored
-
- 17 Oct, 2019 1 commit
-
-
Paul Beesley authored
We would need to update this version for the release but, in fact, it is not required for our publishing workflow; the hosted version of the docs uses git commit/tag information in place of these variables anyway. Instead of updating the version, just remove these variables entirely. Change-Id: I424c4e45786e87604e91c7197b7983579afe4806 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
-
- 15 Oct, 2019 4 commits
-
-
Artsem Artsemenka authored
User guide: 1. Remove obsolete note saying only FVP is supported with AArch32 2. Switch compiler for Juno AArch32 to arm-eabi 3. Mention SOFTWARE folder in Juno Linaro release Index.rst: 1. Switch default FVP model to Version 11.6 Build 45 Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: Ib47a2ea314e2b8394a20189bf91796de0e17de53
-
Paul Beesley authored
-
Paul Beesley authored
-
Paul Beesley authored
The version of the Linaro release that is used for testing was updated in 35010bb8 and the user guide was updated with the correct version, however the version is also mentioned on the index page and that was missed. Update the index page with the new version. We can come back and de-duplicate this content later, to ease future maintenance. Change-Id: I3fe83d7a1c59ab8d3ce2b18bcc23e16c93f7af97 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
-
- 11 Oct, 2019 3 commits
-
-
Paul Beesley authored
-
Paul Beesley authored
Tidying up a few Sphinx warnings that had built-up over time. None of these are critical but it cleans up the Sphinx output. At the same time, fixing some spelling errors that were detected. Change-Id: I38209e235481eed287f8008c6de9dedd6b12ab2e Signed-off-by: Paul Beesley <paul.beesley@arm.com>
-
Balint Dobszay authored
Change-Id: I497072575231730a216220f84a6d349a48eaf5e3 Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
-
- 09 Oct, 2019 4 commits
-
-
Paul Beesley authored
-
Paul Beesley authored
The readme.rst file in the project root is the front-page that is displayed on Github and if viewing the TF-A repository on git.trustedfirmware.org in the "about" view. It now contains a small amount of stub content, and directs readers to the ReadTheDocs documentation via trustedfirmware.org/docs/tf-a. The Github renderer is displaying the content fine but the cgit viewer displays some "backlink" errors because some content substitutions were left in place (terms surrounded by pipe symbols), e.g. |TF-A|. This patch removes those substitutions, that are not supported by cgit, and also updates one heading to clarify where to find the new docs. Change-Id: I358451df45b8c99975ba0b6db8ea61253a10560d Signed-off-by: Paul Beesley <paul.beesley@arm.com>
-
Paul Beesley authored
* changes: doc: Add guide for building the docs locally doc: De-duplicate readme and license files doc: Convert internal links to RST format
-
Paul Beesley authored
This new page contains instructions for doing a local build of the documentation, plus information on the environment setup that needs to be done beforehand. Change-Id: If563145ab40639cabbe25d0f62759981a33692c6 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
-
- 08 Oct, 2019 6 commits
-
-
Paul Beesley authored
The readme.rst and license.rst files in the project root overlap with the index.rst and license.rst files in the docs/ folder. We need to use the latter when building the documentation, as Sphinx requires all included files to be under a common root. However, the files in the root are currently used by the cgit and Github viewers. Using symlinks in Git presents some difficulties so the best course of action is likely to leave these files but in stub form. The license.rst file in the root will simply tell the reader to refer to docs/license.rst. The readme.rst file will contain a small amount of content that is derived from the docs/index.rst file, so that the Github main page will have something valid to show, but it will also contain a link to the full documentation on ReadTheDocs. Change-Id: I6dc46f08777e8d7ecb32ca7afc07a28486c9f77a Signed-off-by: Paul Beesley <paul.beesley@arm.com>
-
Paul Beesley authored
Currently links between documents are using the format: <path/to/><filename>.rst This was required for services like GitHub because they render each document in isolation - linking to another document is like linking to any other file, just provide the full path. However, with the new approach, the .rst files are only the raw source for the documents. Once the documents have been rendered the output is now in another format (HTML in our case) and so, when linking to another document, the link must point to the rendered version and not the .rst file. The RST spec provides a few methods for linking between content. The parent of this patch enabled the automatic creation of anchors for document titles - we will use these anchors as the targets for our links. Additional anchors can be added by hand if needed, on section and sub-section titles, for example. An example of this new format, for a document with the title "Firmware Design" is :ref:`Firmware Design`. One big advantage of this is that anchors are not dependent on paths. We can then move documents around, even between directories, without breaking any links between documents. Links will need to be updated only if the title of a document changes. Change-Id: I9e2340a61dd424cbd8fd1ecc2dc166f460d81703 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
-
Soby Mathew authored
-
Soby Mathew authored
-
Avinash Mehta authored
Currently for Armv7 plaforms the quotient calculated in pl011 uart init code is moved to register r1. This patch moves the quotient to register r2 as done for other platforms in the udiv instruction. Value of register r2 is then used to calculate the values for IBRD and FBRD register Change-Id: Ie6622f9f0e6d634378b471df5d02823b492c8a24 Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>
-
Yann Gautier authored
The function has to use read_cntpct_el0() to update the counter, and not read_cntfrq_el0(). Change-Id: I9c676466e784c3122e9ffc2d87e66708797086e7 Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
- 07 Oct, 2019 5 commits
-
-
Paul Beesley authored
Add meson-g12a, qemu-sbsa and rpi4 to the documentation index so that they will have their docs rendered and integrated into the table of contents. Change-Id: Id972bf2fee67312dd7bff29f92bea67842e62431 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
-
Soby Mathew authored
-
Soby Mathew authored
-
Soby Mathew authored
-
Petre-Ionut Tudor authored
Currently the MDCR_EL3 initialisation implicitly disables MDCR_EL3.SPME by using mov_imm. This patch makes the SPME bit more visible by explicitly disabling it and documenting its use in different versions of the architecture. Signed-off-by: Petre-Ionut Tudor <petre-ionut.tudor@arm.com> Change-Id: I221fdf314f01622f46ac5aa43388f59fa17a29b3
-
- 04 Oct, 2019 3 commits
-
-
laurenw-arm authored
Coherent I-cache is causing a prefetch violation where when the core executes an instruction that has recently been modified, the core might fetch a stale instruction which violates the ordering of instruction fetches. The workaround includes an instruction sequence to implementation defined registers to trap all EL0 IC IVAU instructions to EL3 and a trap handler to execute a TLB inner-shareable invalidation to an arbitrary address followed by a DSB. Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: Ic3b7cbb11cf2eaf9005523ef5578a372593ae4d6
-
Soby Mathew authored
-
Soby Mathew authored
Make the spinlock implementation use ARMv8.1-LSE CAS instruction based on a platform build option. The CAS-based implementation used to be unconditionally selected for all ARM8.1+ platforms. The previous CAS spinlock implementation had a bug wherein the spin_unlock() implementation had an `sev` after `stlr` which is not sufficient. A dsb is needed to ensure that the stlr completes prior to the sev. Having a dsb is heavyweight and a better solution would be to use load exclusive semantics to monitor the lock and wake up from wfe when a store happens to the lock. The patch implements the same. Change-Id: I5283ce4a889376e4cc01d1b9d09afa8229a2e522 Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
-
- 03 Oct, 2019 9 commits
-
-
Lionel Debieve authored
Introduce timeout_init_us/timeout_elapsed() delay tracking with CNTPCT. timeout_init_us(some_timeout_us); returns a reference to detect timeout for the provided microsecond delay value from current time. timeout_elapsed(reference) return true/false whether the reference timeout is elapsed. Cherry picked from OP-TEE implementation [1]. [1] commit 33d30a74502b ("core: timeout detection support") Minor: - Remove stm32mp platform duplicated implementation. - Add new include in marvell ble.mk Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: Iaef6d43c11a2e6992fb48efdc674a0552755ad9c
-
Soby Mathew authored
-
Alexei Fedorov authored
This patch adds support for ARMv8.3-PAuth in BL1 SMC calls and BL2U image for firmware updates by programming APIAKey_EL1 registers and enabling Pointer Authentication in EL3 and EL1 respectively. Change-Id: I875d952aba8242caf74fb5f4f2d2af6f0c768c08 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
-
Soby Mathew authored
-
Imre Kis authored
Change-Id: I1ea2bf088f1e001cdbd377cbfb7c6a2866af0422 Signed-off-by: Imre Kis <imre.kis@arm.com>
-
Soby Mathew authored
* changes: gpio: stm32_gpio: do not mix error code types fdts: stm32mp1: move FDCAN to PLL4_R mmc: increase delay between ACMD41 retries crypto: stm32_hash: align stm32_hash_update() prototype
-
Soby Mathew authored
-
Soby Mathew authored
* changes: qemu/qemu_sbsa: Adding memory mapping for both FLASH0/FLASH1 qemu/qemu_sbsa: Adding Qemu SBSA platform
-
Soby Mathew authored
* changes: mediatek: mt8183: add EMI MPU driver for DRAM protection mediatek: mt8183: add DEVAPC driver to control protection
-