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Commit 906116f8 authored by Madhukar Pappireddy's avatar Madhukar Pappireddy Committed by TrustedFirmware Code Review
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Merge "fix(plat/marvell/a3720/uart): fix configuring UART clock" into integration

parents 4fe55a2f b9185c75
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drivers/marvell/uart/a3700_console.S
View file @ 906116f8
...@@ -49,12 +49,9 @@ func console_a3700_core_init ...@@ -49,12 +49,9 @@ func console_a3700_core_init
lsl w2, w2, #4 lsl w2, w2, #4
add w1, w1, w2, lsr #1 add w1, w1, w2, lsr #1
udiv w2, w1, w2 udiv w2, w1, w2
and w2, w2, #0x3ff and w2, w2, #0x3ff /* clear all other bits to use default clock */
ldr w3, [x0, #UART_BAUD_REG] str w2, [x0, #UART_BAUD_REG]/* set baud rate divisor */
bic w3, w3, 0x3ff
orr w3, w3, w2
str w3, [x0, #UART_BAUD_REG]/* set baud rate divisor */
/* Set UART to default 16X scheme */ /* Set UART to default 16X scheme */
mov w3, #0 mov w3, #0
......
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