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Unverified Commit c7aa7fdf authored by davidcunado-arm's avatar davidcunado-arm Committed by GitHub
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Merge pull request #1263 from soby-mathew/sm/dyn_config 

Dynamic Configuration Prototype
parents 5ff6da94 da5f2745
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include/common/tbbr/tbbr_img_def.h
View file @ c7aa7fdf
/* /*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -60,4 +60,19 @@ ...@@ -60,4 +60,19 @@
/* Secure Payload BL32_EXTRA2 (Trusted OS Extra2) */ /* Secure Payload BL32_EXTRA2 (Trusted OS Extra2) */
#define BL32_EXTRA2_IMAGE_ID 22 #define BL32_EXTRA2_IMAGE_ID 22
/* HW_CONFIG (e.g. Kernel DT) */
#define HW_CONFIG_ID 23
/* TB_FW_CONFIG */
#define TB_FW_CONFIG_ID 24
/* SOC_FW_CONFIG */
#define SOC_FW_CONFIG_ID 25
/* TOS_FW_CONFIG */
#define TOS_FW_CONFIG_ID 26
/* NT_FW_CONFIG */
#define NT_FW_CONFIG_ID 27
#endif /* __TBBR_IMG_DEF_H__ */ #endif /* __TBBR_IMG_DEF_H__ */
include/plat/arm/board/common/board_arm_def.h
View file @ c7aa7fdf
/* /*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
......
include/plat/arm/common/arm_def.h
View file @ c7aa7fdf
/* /*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -306,6 +306,12 @@ ...@@ -306,6 +306,12 @@
*/ */
#define CACHE_WRITEBACK_GRANULE (1 << ARM_CACHE_WRITEBACK_SHIFT) #define CACHE_WRITEBACK_GRANULE (1 << ARM_CACHE_WRITEBACK_SHIFT)
/*
* To enable TB_FW_CONFIG to be loaded by BL1, define the corresponding base
* and limit. Leave enough space of BL2 meminfo.
*/
#define ARM_TB_FW_CONFIG_BASE ARM_BL_RAM_BASE + sizeof(meminfo_t)
#define ARM_TB_FW_CONFIG_LIMIT BL2_LIMIT
/******************************************************************************* /*******************************************************************************
* BL1 specific defines. * BL1 specific defines.
......
include/plat/arm/common/arm_dyn_cfg_helpers.h 0 → 100644
View file @ c7aa7fdf
/*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __ARM_DYN_CFG_HELPERS_H__
#define __ARM_DYN_CFG_HELPERS_H__
#include <stdint.h>
/* Function declaration */
int arm_dyn_get_hwconfig_info(void *dtb, int node,
uint64_t *hw_config_addr, uint32_t *hw_config_size);
int arm_dyn_tb_fw_cfg_init(void *dtb, int *node);
#endif /* __ARM_DYN_CFG_HELPERS_H__ */
include/plat/arm/common/plat_arm.h
View file @ c7aa7fdf
/* /*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
struct bl31_params; struct bl31_params;
struct meminfo; struct meminfo;
struct image_info; struct image_info;
struct bl_params;
#define ARM_CASSERT_MMAP \ #define ARM_CASSERT_MMAP \
CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \ CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \
...@@ -138,7 +139,7 @@ void arm_bl1_platform_setup(void); ...@@ -138,7 +139,7 @@ void arm_bl1_platform_setup(void);
void arm_bl1_plat_arch_setup(void); void arm_bl1_plat_arch_setup(void);
/* BL2 utility functions */ /* BL2 utility functions */
void arm_bl2_early_platform_setup(struct meminfo *mem_layout); void arm_bl2_early_platform_setup(uintptr_t tb_fw_config, struct meminfo *mem_layout);
void arm_bl2_platform_setup(void); void arm_bl2_platform_setup(void);
void arm_bl2_plat_arch_setup(void); void arm_bl2_plat_arch_setup(void);
uint32_t arm_get_spsr_for_bl32_entry(void); uint32_t arm_get_spsr_for_bl32_entry(void);
...@@ -157,11 +158,11 @@ void arm_bl2u_plat_arch_setup(void); ...@@ -157,11 +158,11 @@ void arm_bl2u_plat_arch_setup(void);
/* BL31 utility functions */ /* BL31 utility functions */
#if LOAD_IMAGE_V2 #if LOAD_IMAGE_V2
void arm_bl31_early_platform_setup(void *from_bl2, void arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
void *plat_params_from_bl2); uintptr_t hw_config, void *plat_params_from_bl2);
#else #else
void arm_bl31_early_platform_setup(struct bl31_params *from_bl2, void arm_bl31_early_platform_setup(struct bl31_params *from_bl2, uintptr_t soc_fw_config,
void *plat_params_from_bl2); uintptr_t hw_config, void *plat_params_from_bl2);
#endif /* LOAD_IMAGE_V2 */ #endif /* LOAD_IMAGE_V2 */
void arm_bl31_platform_setup(void); void arm_bl31_platform_setup(void);
void arm_bl31_plat_runtime_setup(void); void arm_bl31_plat_runtime_setup(void);
...@@ -171,13 +172,18 @@ void arm_bl31_plat_arch_setup(void); ...@@ -171,13 +172,18 @@ void arm_bl31_plat_arch_setup(void);
void arm_tsp_early_platform_setup(void); void arm_tsp_early_platform_setup(void);
/* SP_MIN utility functions */ /* SP_MIN utility functions */
void arm_sp_min_early_platform_setup(void *from_bl2, void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
void *plat_params_from_bl2); uintptr_t hw_config, void *plat_params_from_bl2);
void arm_sp_min_plat_runtime_setup(void); void arm_sp_min_plat_runtime_setup(void);
/* FIP TOC validity check */ /* FIP TOC validity check */
int arm_io_is_toc_valid(void); int arm_io_is_toc_valid(void);
/* Utility functions for Dynamic Config */
void arm_load_tb_fw_config(void);
void arm_bl2_set_tb_cfg_addr(void *dtb);
void arm_bl2_dyn_cfg_init(void);
/* /*
* Mandatory functions required in ARM standard platforms * Mandatory functions required in ARM standard platforms
*/ */
......
include/plat/common/platform.h
View file @ c7aa7fdf
...@@ -134,9 +134,10 @@ int bl1_plat_mem_check(uintptr_t mem_base, unsigned int mem_size, ...@@ -134,9 +134,10 @@ int bl1_plat_mem_check(uintptr_t mem_base, unsigned int mem_size,
/******************************************************************************* /*******************************************************************************
* Optional BL1 functions (may be overridden) * Optional BL1 functions (may be overridden)
******************************************************************************/ ******************************************************************************/
#if !ERROR_DEPRECATED
void bl1_init_bl2_mem_layout(const struct meminfo *bl1_mem_layout, void bl1_init_bl2_mem_layout(const struct meminfo *bl1_mem_layout,
struct meminfo *bl2_mem_layout); struct meminfo *bl2_mem_layout);
#endif
/* /*
* The following functions are used for image loading process in BL1. * The following functions are used for image loading process in BL1.
*/ */
...@@ -155,20 +156,20 @@ struct image_desc *bl1_plat_get_image_desc(unsigned int image_id); ...@@ -155,20 +156,20 @@ struct image_desc *bl1_plat_get_image_desc(unsigned int image_id);
*/ */
__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved); __dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved);
#if LOAD_IMAGE_V2
/* /*
* This function can be used by the platforms to update/use image * This BL1 function can be used by the platforms to update/use image
* information for BL2. * information for a given `image_id`.
*/ */
int bl1_plat_handle_pre_image_load(void); int bl1_plat_handle_pre_image_load(unsigned int image_id);
int bl1_plat_handle_post_image_load(void); int bl1_plat_handle_post_image_load(unsigned int image_id);
#endif /* LOAD_IMAGE_V2 */
/******************************************************************************* /*******************************************************************************
* Mandatory BL2 functions * Mandatory BL2 functions
******************************************************************************/ ******************************************************************************/
void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3);
#if !ERROR_DEPRECATED
void bl2_early_platform_setup(struct meminfo *mem_layout); void bl2_early_platform_setup(struct meminfo *mem_layout);
#endif
void bl2_plat_arch_setup(void); void bl2_plat_arch_setup(void);
void bl2_platform_setup(void); void bl2_platform_setup(void);
struct meminfo *bl2_plat_sec_mem_layout(void); struct meminfo *bl2_plat_sec_mem_layout(void);
...@@ -280,6 +281,7 @@ int bl2u_plat_handle_scp_bl2u(void); ...@@ -280,6 +281,7 @@ int bl2u_plat_handle_scp_bl2u(void);
/******************************************************************************* /*******************************************************************************
* Mandatory BL31 functions * Mandatory BL31 functions
******************************************************************************/ ******************************************************************************/
#if !ERROR_DEPRECATED
#if LOAD_IMAGE_V2 #if LOAD_IMAGE_V2
void bl31_early_platform_setup(void *from_bl2, void bl31_early_platform_setup(void *from_bl2,
void *plat_params_from_bl2); void *plat_params_from_bl2);
...@@ -287,6 +289,9 @@ void bl31_early_platform_setup(void *from_bl2, ...@@ -287,6 +289,9 @@ void bl31_early_platform_setup(void *from_bl2,
void bl31_early_platform_setup(struct bl31_params *from_bl2, void bl31_early_platform_setup(struct bl31_params *from_bl2,
void *plat_params_from_bl2); void *plat_params_from_bl2);
#endif #endif
#endif /* ERROR_DEPRECATED */
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3);
void bl31_plat_arch_setup(void); void bl31_plat_arch_setup(void);
void bl31_platform_setup(void); void bl31_platform_setup(void);
void bl31_plat_runtime_setup(void); void bl31_plat_runtime_setup(void);
......
include/tools_share/firmware_image_package.h
View file @ c7aa7fdf
/* /*
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -63,6 +63,11 @@ ...@@ -63,6 +63,11 @@
{0x11449fa4, 0x635e, 0x11e4, 0x87, 0x28, {0x3f, 0x05, 0x72, 0x2a, 0xf3, 0x3d} } {0x11449fa4, 0x635e, 0x11e4, 0x87, 0x28, {0x3f, 0x05, 0x72, 0x2a, 0xf3, 0x3d} }
#define UUID_NON_TRUSTED_FW_CONTENT_CERT \ #define UUID_NON_TRUSTED_FW_CONTENT_CERT \
{0xf3c1c48e, 0x635d, 0x11e4, 0xa7, 0xa9, {0x87, 0xee, 0x40, 0xb2, 0x3f, 0xa7} } {0xf3c1c48e, 0x635d, 0x11e4, 0xa7, 0xa9, {0x87, 0xee, 0x40, 0xb2, 0x3f, 0xa7} }
/* Dynamic configs */
#define UUID_HW_CONFIG \
{0xd9f1b808, 0xcfc9, 0x4993, 0xa9, 0x62, {0x6f, 0xbc, 0x6b, 0x72, 0x65, 0xcc} }
#define UUID_TB_FW_CONFIG \
{0xff58046c, 0x6baf, 0x4f7d, 0x82, 0xed, {0xaa, 0x27, 0xbc, 0x69, 0xbf, 0xd2} }
typedef struct fip_toc_header { typedef struct fip_toc_header {
uint32_t name; uint32_t name;
......
include/tools_share/tbbr_oid.h
View file @ c7aa7fdf
/* /*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -41,7 +41,8 @@ ...@@ -41,7 +41,8 @@
/* TrustedBootFirmwareHash - BL2 */ /* TrustedBootFirmwareHash - BL2 */
#define TRUSTED_BOOT_FW_HASH_OID "1.3.6.1.4.1.4128.2100.201" #define TRUSTED_BOOT_FW_HASH_OID "1.3.6.1.4.1.4128.2100.201"
#define TRUSTED_BOOT_FW_CONFIG_HASH_OID "1.3.6.1.4.1.4128.2100.202"
#define HW_CONFIG_HASH_OID "1.3.6.1.4.1.4128.2100.203"
/* /*
* Trusted Key Certificate * Trusted Key Certificate
......
make_helpers/build_macros.mk
View file @ c7aa7fdf
...@@ -344,15 +344,18 @@ $(if $(2),$(call TOOL_ADD_IMG_PAYLOAD,bl$(1),$(BIN),--$(2),$(BIN),$(3))) ...@@ -344,15 +344,18 @@ $(if $(2),$(call TOOL_ADD_IMG_PAYLOAD,bl$(1),$(BIN),--$(2),$(BIN),$(3)))
endef endef
# Convert device tree source file names to matching blobs
# $(1) = input dts
define SOURCES_TO_DTBS define SOURCES_TO_DTBS
$(notdir $(patsubst %.dts,%.dtb,$(filter %.dts,$(1)))) $(notdir $(patsubst %.dts,%.dtb,$(filter %.dts,$(1))))
endef endef
# MAKE_FDT macro defines the targets and options to build each FDT binary # MAKE_FDT_DIRS macro creates the prerequisite directories that host the
# Arguments: (none) # FDT binaries
define MAKE_FDT # $(1) = output directory
$(eval DTB_BUILD_DIR := ${BUILD_PLAT}/fdts) # $(2) = input dts
$(eval DTBS := $(addprefix $(DTB_BUILD_DIR)/,$(call SOURCES_TO_DTBS,$(FDT_SOURCES)))) define MAKE_FDT_DIRS
$(eval DTBS := $(addprefix $(1)/,$(call SOURCES_TO_DTBS,$(2))))
$(eval TEMP_DTB_DIRS := $(sort $(dir ${DTBS}))) $(eval TEMP_DTB_DIRS := $(sort $(dir ${DTBS})))
# The $(dir ) function leaves a trailing / on the directory names # The $(dir ) function leaves a trailing / on the directory names
# Rip off the / to match directory names with make rule targets. # Rip off the / to match directory names with make rule targets.
...@@ -361,19 +364,18 @@ define MAKE_FDT ...@@ -361,19 +364,18 @@ define MAKE_FDT
$(eval $(foreach objd,${DTB_DIRS},$(call MAKE_PREREQ_DIR,${objd},${BUILD_DIR}))) $(eval $(foreach objd,${DTB_DIRS},$(call MAKE_PREREQ_DIR,${objd},${BUILD_DIR})))
fdt_dirs: ${DTB_DIRS} fdt_dirs: ${DTB_DIRS}
endef endef
# MAKE_DTB generate the Flattened device tree binary (device tree binary) # MAKE_DTB generate the Flattened device tree binary
# $(1) = output directory # $(1) = output directory
# $(2) = input dts # $(2) = input dts
define MAKE_DTB define MAKE_DTB
$(eval DOBJ := $(1)/$(patsubst %.dts,%.dtb,$(notdir $(2)))) $(eval DOBJ := $(addprefix $(1)/,$(call SOURCES_TO_DTBS,$(2))))
$(eval DEP := $(patsubst %.dtb,%.d,$(DOBJ))) $(eval DEP := $(patsubst %.dtb,%.d,$(DOBJ)))
$(DOBJ): $(2) $(MAKEFILE_LIST) | fdt_dirs $(DOBJ): $(2) $(MAKEFILE_LIST) | fdt_dirs
@echo " DTC $$<" @echo " DTC $$<"
$$(Q)$$(DTC) $$(DTC_FLAGS) -d $(DEP) -o $$@ $$< $$(Q)$$(DTC) $$(DTC_FLAGS) -d $(DEP) -o $$@ $$<
-include $(DEP) -include $(DEP)
...@@ -386,7 +388,11 @@ endef ...@@ -386,7 +388,11 @@ endef
define MAKE_DTBS define MAKE_DTBS
$(eval DOBJS := $(filter %.dts,$(2))) $(eval DOBJS := $(filter %.dts,$(2)))
$(eval REMAIN := $(filter-out %.dts,$(2))) $(eval REMAIN := $(filter-out %.dts,$(2)))
$(and $(REMAIN),$(error FDT_SOURCES contain non-DTS files: $(REMAIN)))
$(eval $(foreach obj,$(DOBJS),$(call MAKE_DTB,$(1),$(obj)))) $(eval $(foreach obj,$(DOBJS),$(call MAKE_DTB,$(1),$(obj))))
$(and $(REMAIN),$(error Unexpected s present: $(REMAIN))) $(eval $(call MAKE_FDT_DIRS,$(1),$(2)))
dtbs: $(DTBS)
all: dtbs
endef endef
plat/arm/board/fvp/fdts/fvp_tb_fw_config.dts 0 → 100644
View file @ c7aa7fdf
/*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/dts-v1/;
/ {
/* Platform Config */
plat_arm_bl2 {
compatible = "arm,tb_fw";
hw_config_addr = <0x0 0x82000000>;
hw_config_max_size = <0x01000000>;
};
};
plat/arm/board/fvp/fvp_bl2_setup.c
View file @ c7aa7fdf
/* /*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -7,15 +7,15 @@ ...@@ -7,15 +7,15 @@
#include <generic_delay_timer.h> #include <generic_delay_timer.h>
#include <mmio.h> #include <mmio.h>
#include <plat_arm.h> #include <plat_arm.h>
#include <platform.h>
#include <sp804_delay_timer.h> #include <sp804_delay_timer.h>
#include <v2m_def.h> #include <v2m_def.h>
#include "fvp_def.h" #include "fvp_def.h"
#include "fvp_private.h" #include "fvp_private.h"
void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3)
void bl2_early_platform_setup(meminfo_t *mem_layout)
{ {
arm_bl2_early_platform_setup(mem_layout); arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1);
/* Initialize the platform config for future decision making */ /* Initialize the platform config for future decision making */
fvp_config_setup(); fvp_config_setup();
......
plat/arm/board/fvp/fvp_bl31_setup.c
View file @ c7aa7fdf
/* /*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#include <arm_config.h> #include <arm_config.h>
#include <plat_arm.h> #include <plat_arm.h>
#include <platform.h>
#include <smmu_v3.h> #include <smmu_v3.h>
#include "fvp_private.h" #include "fvp_private.h"
#if LOAD_IMAGE_V2 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
void bl31_early_platform_setup(void *from_bl2, u_register_t arg2, u_register_t arg3)
void *plat_params_from_bl2)
#else
void bl31_early_platform_setup(bl31_params_t *from_bl2,
void *plat_params_from_bl2)
#endif
{ {
arm_bl31_early_platform_setup(from_bl2, plat_params_from_bl2); arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
/* Initialize the platform config for future decision making */ /* Initialize the platform config for future decision making */
fvp_config_setup(); fvp_config_setup();
......
plat/arm/board/fvp/fvp_io_storage.c
View file @ c7aa7fdf
/* /*
* Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -18,6 +18,8 @@ ...@@ -18,6 +18,8 @@
#define BL31_IMAGE_NAME "bl31.bin" #define BL31_IMAGE_NAME "bl31.bin"
#define BL32_IMAGE_NAME "bl32.bin" #define BL32_IMAGE_NAME "bl32.bin"
#define BL33_IMAGE_NAME "bl33.bin" #define BL33_IMAGE_NAME "bl33.bin"
#define TB_FW_CONFIG_NAME "fvp_tb_fw_config.dtb"
#define HW_CONFIG_NAME "hw_config.dtb"
#if TRUSTED_BOARD_BOOT #if TRUSTED_BOARD_BOOT
#define TRUSTED_BOOT_FW_CERT_NAME "tb_fw.crt" #define TRUSTED_BOOT_FW_CERT_NAME "tb_fw.crt"
...@@ -51,6 +53,14 @@ static const io_file_spec_t sh_file_spec[] = { ...@@ -51,6 +53,14 @@ static const io_file_spec_t sh_file_spec[] = {
.path = BL33_IMAGE_NAME, .path = BL33_IMAGE_NAME,
.mode = FOPEN_MODE_RB .mode = FOPEN_MODE_RB
}, },
[TB_FW_CONFIG_ID] = {
.path = TB_FW_CONFIG_NAME,
.mode = FOPEN_MODE_RB
},
[HW_CONFIG_ID] = {
.path = HW_CONFIG_NAME,
.mode = FOPEN_MODE_RB
},
#if TRUSTED_BOARD_BOOT #if TRUSTED_BOARD_BOOT
[TRUSTED_BOOT_FW_CERT_ID] = { [TRUSTED_BOOT_FW_CERT_ID] = {
.path = TRUSTED_BOOT_FW_CERT_NAME, .path = TRUSTED_BOOT_FW_CERT_NAME,
......
plat/arm/board/fvp/platform.mk
View file @ c7aa7fdf
# #
# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. # Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
# #
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
...@@ -16,6 +16,8 @@ FVP_CLUSTER_COUNT := 2 ...@@ -16,6 +16,8 @@ FVP_CLUSTER_COUNT := 2
# Default number of threads per CPU on FVP # Default number of threads per CPU on FVP
FVP_MAX_PE_PER_CPU := 1 FVP_MAX_PE_PER_CPU := 1
FVP_DT_PREFIX := fvp-base-gicv3-psci
$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) $(eval $(call assert_boolean,FVP_USE_SP804_TIMER))
$(eval $(call add_define,FVP_USE_SP804_TIMER)) $(eval $(call add_define,FVP_USE_SP804_TIMER))
...@@ -59,6 +61,9 @@ FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ ...@@ -59,6 +61,9 @@ FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
drivers/arm/gic/v2/gicv2_helpers.c \ drivers/arm/gic/v2/gicv2_helpers.c \
plat/common/plat_gicv2.c \ plat/common/plat_gicv2.c \
plat/arm/common/arm_gicv2.c plat/arm/common/arm_gicv2.c
FVP_DT_PREFIX := fvp-base-gicv2-psci
else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3_LEGACY) else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3_LEGACY)
ifeq (${ARCH}, aarch32) ifeq (${ARCH}, aarch32)
$(error "GICV3 Legacy driver not supported for AArch32 build") $(error "GICV3 Legacy driver not supported for AArch32 build")
...@@ -68,6 +73,9 @@ FVP_GIC_SOURCES := drivers/arm/gic/arm_gic.c \ ...@@ -68,6 +73,9 @@ FVP_GIC_SOURCES := drivers/arm/gic/arm_gic.c \
drivers/arm/gic/gic_v3.c \ drivers/arm/gic/gic_v3.c \
plat/common/plat_gic.c \ plat/common/plat_gic.c \
plat/arm/common/arm_gicv3_legacy.c plat/arm/common/arm_gicv3_legacy.c
FVP_DT_PREFIX := fvp-base-gicv2-psci
else else
$(error "Incorrect GIC driver chosen on FVP port") $(error "Incorrect GIC driver chosen on FVP port")
endif endif
...@@ -151,6 +159,20 @@ BL31_SOURCES += drivers/arm/smmu/smmu_v3.c \ ...@@ -151,6 +159,20 @@ BL31_SOURCES += drivers/arm/smmu/smmu_v3.c \
${FVP_INTERCONNECT_SOURCES} \ ${FVP_INTERCONNECT_SOURCES} \
${FVP_SECURITY_SOURCES} ${FVP_SECURITY_SOURCES}
# Add the FDT_SOURCES and options for Dynamic Config
FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tb_fw_config.dts
FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
# Add the TB_FW_CONFIG to FIP and specify the same to certtool
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config))
FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
# Add the HW_CONFIG to FIP and specify the same to certtool
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config))
# Disable the PSCI platform compatibility layer # Disable the PSCI platform compatibility layer
ENABLE_PLAT_COMPAT := 0 ENABLE_PLAT_COMPAT := 0
......
plat/arm/board/fvp/sp_min/fvp_sp_min_setup.c
View file @ c7aa7fdf
/* /*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -7,10 +7,10 @@ ...@@ -7,10 +7,10 @@
#include <plat_arm.h> #include <plat_arm.h>
#include "../fvp_private.h" #include "../fvp_private.h"
void sp_min_early_platform_setup(void *from_bl2, void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1,
void *plat_params_from_bl2) u_register_t arg2, u_register_t arg3)
{ {
arm_sp_min_early_platform_setup(from_bl2, plat_params_from_bl2); arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
/* Initialize the platform config for future decision making */ /* Initialize the platform config for future decision making */
fvp_config_setup(); fvp_config_setup();
......
plat/arm/board/juno/include/platform_def.h
View file @ c7aa7fdf
...@@ -110,12 +110,12 @@ ...@@ -110,12 +110,12 @@
*/ */
#if TRUSTED_BOARD_BOOT #if TRUSTED_BOARD_BOOT
#if TF_MBEDTLS_KEY_ALG_ID == TF_MBEDTLS_RSA_AND_ECDSA #if TF_MBEDTLS_KEY_ALG_ID == TF_MBEDTLS_RSA_AND_ECDSA
# define PLAT_ARM_MAX_BL2_SIZE 0x1E000 # define PLAT_ARM_MAX_BL2_SIZE 0x1F000
#else #else
# define PLAT_ARM_MAX_BL2_SIZE 0x1A000 # define PLAT_ARM_MAX_BL2_SIZE 0x1B000
#endif #endif
#else #else
# define PLAT_ARM_MAX_BL2_SIZE 0xC000 # define PLAT_ARM_MAX_BL2_SIZE 0xD000
#endif #endif
/* /*
......
plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
View file @ c7aa7fdf
/* /*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -54,7 +54,15 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = { ...@@ -54,7 +54,15 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
.next_handoff_image_id = BL33_IMAGE_ID, .next_handoff_image_id = BL33_IMAGE_ID,
}, },
/* Fill HW_CONFIG related information if it exists */
{
.image_id = HW_CONFIG_ID,
SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
VERSION_2, entry_point_info_t, NON_SECURE | NON_EXECUTABLE),
SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
VERSION_2, image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
.next_handoff_image_id = INVALID_IMAGE_ID,
},
/* Fill BL33 related information */ /* Fill BL33 related information */
{ {
.image_id = BL33_IMAGE_ID, .image_id = BL33_IMAGE_ID,
......
plat/arm/common/aarch64/arm_bl2_mem_params_desc.c
View file @ c7aa7fdf
/* /*
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -68,7 +68,7 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = { ...@@ -68,7 +68,7 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
.ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
DISABLE_ALL_EXCEPTIONS), DISABLE_ALL_EXCEPTIONS),
#if DEBUG #if DEBUG
.ep_info.args.arg1 = ARM_BL31_PLAT_PARAM_VAL, .ep_info.args.arg3 = ARM_BL31_PLAT_PARAM_VAL,
#endif #endif
SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
...@@ -82,7 +82,15 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = { ...@@ -82,7 +82,15 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
.next_handoff_image_id = BL33_IMAGE_ID, .next_handoff_image_id = BL33_IMAGE_ID,
# endif # endif
}, },
/* Fill HW_CONFIG related information */
{
.image_id = HW_CONFIG_ID,
SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
VERSION_2, entry_point_info_t, NON_SECURE | NON_EXECUTABLE),
SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
VERSION_2, image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
.next_handoff_image_id = INVALID_IMAGE_ID,
},
# ifdef BL32_BASE # ifdef BL32_BASE
/* Fill BL32 related information */ /* Fill BL32 related information */
{ {
......
plat/arm/common/arm_bl1_setup.c
View file @ c7aa7fdf
/* /*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -115,6 +115,9 @@ void arm_bl1_platform_setup(void) ...@@ -115,6 +115,9 @@ void arm_bl1_platform_setup(void)
{ {
/* Initialise the IO layer and register platform IO devices */ /* Initialise the IO layer and register platform IO devices */
plat_arm_io_setup(); plat_arm_io_setup();
#if LOAD_IMAGE_V2
arm_load_tb_fw_config();
#endif
} }
void bl1_platform_setup(void) void bl1_platform_setup(void)
......
plat/arm/common/arm_bl2_setup.c
View file @ c7aa7fdf
/* /*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -39,7 +39,7 @@ static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); ...@@ -39,7 +39,7 @@ static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
CASSERT(BL2_BASE >= (ARM_BL_RAM_BASE + BL1_MEMINFO_OFFSET), assert_bl2_base_overflows); CASSERT(BL2_BASE >= (ARM_BL_RAM_BASE + BL1_MEMINFO_OFFSET), assert_bl2_base_overflows);
/* Weak definitions may be overridden in specific ARM standard platform */ /* Weak definitions may be overridden in specific ARM standard platform */
#pragma weak bl2_early_platform_setup #pragma weak bl2_early_platform_setup2
#pragma weak bl2_platform_setup #pragma weak bl2_platform_setup
#pragma weak bl2_plat_arch_setup #pragma weak bl2_plat_arch_setup
#pragma weak bl2_plat_sec_mem_layout #pragma weak bl2_plat_sec_mem_layout
...@@ -169,7 +169,7 @@ void bl2_plat_flush_bl31_params(void) ...@@ -169,7 +169,7 @@ void bl2_plat_flush_bl31_params(void)
struct entry_point_info *bl2_plat_get_bl31_ep_info(void) struct entry_point_info *bl2_plat_get_bl31_ep_info(void)
{ {
#if DEBUG #if DEBUG
bl31_params_mem.bl31_ep_info.args.arg1 = ARM_BL31_PLAT_PARAM_VAL; bl31_params_mem.bl31_ep_info.args.arg3 = ARM_BL31_PLAT_PARAM_VAL;
#endif #endif
return &bl31_params_mem.bl31_ep_info; return &bl31_params_mem.bl31_ep_info;
...@@ -181,7 +181,7 @@ struct entry_point_info *bl2_plat_get_bl31_ep_info(void) ...@@ -181,7 +181,7 @@ struct entry_point_info *bl2_plat_get_bl31_ep_info(void)
* in x0. This memory layout is sitting at the base of the free trusted SRAM. * in x0. This memory layout is sitting at the base of the free trusted SRAM.
* Copy it to a safe location before its reclaimed by later BL2 functionality. * Copy it to a safe location before its reclaimed by later BL2 functionality.
******************************************************************************/ ******************************************************************************/
void arm_bl2_early_platform_setup(meminfo_t *mem_layout) void arm_bl2_early_platform_setup(uintptr_t tb_fw_config, meminfo_t *mem_layout)
{ {
/* Initialize the console to provide early debug support */ /* Initialize the console to provide early debug support */
console_init(PLAT_ARM_BOOT_UART_BASE, PLAT_ARM_BOOT_UART_CLK_IN_HZ, console_init(PLAT_ARM_BOOT_UART_BASE, PLAT_ARM_BOOT_UART_CLK_IN_HZ,
...@@ -192,11 +192,17 @@ void arm_bl2_early_platform_setup(meminfo_t *mem_layout) ...@@ -192,11 +192,17 @@ void arm_bl2_early_platform_setup(meminfo_t *mem_layout)
/* Initialise the IO layer and register platform IO devices */ /* Initialise the IO layer and register platform IO devices */
plat_arm_io_setup(); plat_arm_io_setup();
#if LOAD_IMAGE_V2
if (tb_fw_config != 0U)
arm_bl2_set_tb_cfg_addr((void *)tb_fw_config);
#endif
} }
void bl2_early_platform_setup(meminfo_t *mem_layout) void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3)
{ {
arm_bl2_early_platform_setup(mem_layout); arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1);
generic_delay_timer_init(); generic_delay_timer_init();
} }
...@@ -205,6 +211,10 @@ void bl2_early_platform_setup(meminfo_t *mem_layout) ...@@ -205,6 +211,10 @@ void bl2_early_platform_setup(meminfo_t *mem_layout)
*/ */
void arm_bl2_platform_setup(void) void arm_bl2_platform_setup(void)
{ {
#if LOAD_IMAGE_V2
arm_bl2_dyn_cfg_init();
#endif
/* Initialize the secure environment */ /* Initialize the secure environment */
plat_arm_security_setup(); plat_arm_security_setup();
......
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