Commit c9711432 authored by Dimitris Papastamos's avatar Dimitris Papastamos
Browse files

juno: Fix AArch32 build

Commit 6de8b24f

 broke Juno AArch32
build.

Change-Id: Ied70d9becb86e53ccb46a2e3245e2a551d1bf701
Signed-off-by: default avatarDimitris Papastamos <dimitris.papastamos@arm.com>
parent f9688f27
...@@ -81,9 +81,9 @@ func JUNO_HANDLER(0) ...@@ -81,9 +81,9 @@ func JUNO_HANDLER(0)
* Cortex-A57 specific settings * Cortex-A57 specific settings
* -------------------------------------------------------------------- * --------------------------------------------------------------------
*/ */
mov r0, #((L2_DATA_RAM_LATENCY_3_CYCLES << L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ mov r0, #((CORTEX_A57_L2_DATA_RAM_LATENCY_3_CYCLES << CORTEX_A57_L2CTLR_DATA_RAM_LATENCY_SHIFT) | \
(L2_TAG_RAM_LATENCY_3_CYCLES << L2CTLR_TAG_RAM_LATENCY_SHIFT)) (CORTEX_A57_L2_TAG_RAM_LATENCY_3_CYCLES << CORTEX_A57_L2CTLR_TAG_RAM_LATENCY_SHIFT))
stcopr r0, L2CTLR stcopr r0, CORTEX_A57_L2CTLR
1: 1:
isb isb
bx lr bx lr
...@@ -118,8 +118,8 @@ A57: ...@@ -118,8 +118,8 @@ A57:
* Cortex-A57 specific settings * Cortex-A57 specific settings
* -------------------------------------------------------------------- * --------------------------------------------------------------------
*/ */
mov r0, #(L2_DATA_RAM_LATENCY_3_CYCLES << L2CTLR_DATA_RAM_LATENCY_SHIFT) mov r0, #(CORTEX_A57_L2_DATA_RAM_LATENCY_3_CYCLES << CORTEX_A57_L2CTLR_DATA_RAM_LATENCY_SHIFT)
stcopr r0, L2CTLR stcopr r0, CORTEX_A57_L2CTLR
isb isb
bx lr bx lr
endfunc JUNO_HANDLER(1) endfunc JUNO_HANDLER(1)
...@@ -152,9 +152,9 @@ A72: ...@@ -152,9 +152,9 @@ A72:
* Cortex-A72 specific settings * Cortex-A72 specific settings
* -------------------------------------------------------------------- * --------------------------------------------------------------------
*/ */
mov r0, #((L2_DATA_RAM_LATENCY_3_CYCLES << L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ mov r0, #((CORTEX_A72_L2_DATA_RAM_LATENCY_3_CYCLES << CORTEX_A72_L2CTLR_DATA_RAM_LATENCY_SHIFT) | \
(L2_TAG_RAM_LATENCY_2_CYCLES << L2CTLR_TAG_RAM_LATENCY_SHIFT)) (CORTEX_A72_L2_TAG_RAM_LATENCY_2_CYCLES << CORTEX_A72_L2CTLR_TAG_RAM_LATENCY_SHIFT))
stcopr r0, L2CTLR stcopr r0, CORTEX_A72_L2CTLR
isb isb
bx lr bx lr
endfunc JUNO_HANDLER(2) endfunc JUNO_HANDLER(2)
......
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