Commit db1ef41a authored by Olivier Deprez's avatar Olivier Deprez
Browse files

SPM: build OP-TEE as an S-EL1 Secure Partition



Provide manifest and build options to boot OP-TEE as a
guest S-EL1 Secure Partition on top of Hafnium in S-EL2.

Increase ARM_SP_MAX_SIZE to cope with OP-TEE debug build image.
Signed-off-by: default avatarOlivier Deprez <olivier.deprez@arm.com>
Change-Id: Idd2686fa689a78fe2d05ed92b1d23c65e2edd4cb
parent f0b1864f
...@@ -484,6 +484,10 @@ ifneq (${SPD},none) ...@@ -484,6 +484,10 @@ ifneq (${SPD},none)
$(error SPMD with SPM at S-EL2 requires CTX_INCLUDE_EL2_REGS option) $(error SPMD with SPM at S-EL2 requires CTX_INCLUDE_EL2_REGS option)
endif endif
endif endif
ifeq ($(findstring optee_sp,$(ARM_SPMC_MANIFEST_DTS)),optee_sp)
DTC_CPPFLAGS += -DOPTEE_SP_FW_CONFIG
endif
else else
# All other SPDs in spd directory # All other SPDs in spd directory
SPD_DIR := spd SPD_DIR := spd
......
...@@ -91,6 +91,9 @@ Arm Platform Build Options ...@@ -91,6 +91,9 @@ Arm Platform Build Options
platforms. If this option is specified, then the path to the CryptoCell platforms. If this option is specified, then the path to the CryptoCell
SBROM library must be specified via ``CCSBROM_LIB_PATH`` flag. SBROM library must be specified via ``CCSBROM_LIB_PATH`` flag.
- ``ARM_SPMC_MANIFEST_DTS`` : path to an alternate manifest file used as the
SPMC Core manifest. Valid when ``SPD=spmd`` is selected.
For a better understanding of these options, the Arm development platform memory For a better understanding of these options, the Arm development platform memory
map is explained in the :ref:`Firmware Design`. map is explained in the :ref:`Firmware Design`.
......
/*
* Copyright (c) 2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
* This file is a Partition Manifest (PM) for a minimal Secure Partition (SP)
* that has additional optional properties defined.
*
*/
/dts-v1/;
/ {
compatible = "arm,ffa-manifest-1.0";
/* Properties */
description = "op-tee";
ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
uuid = <0x486178e0 0xe7f811e3 0xbc5e0002 0xa5d5c51b>;
id = <1>;
execution-ctx-count = <8>;
exception-level = <2>; /* S-EL1 */
execution-state = <0>; /* AARCH64 */
load-address = <0x6280000>;
entrypoint-offset = <0x1000>;
xlat-granule = <0>; /* 4KiB */
boot-order = <0>;
messaging-method = <0>; /* Direct messaging only */
run-time-model = <1>; /* Run to completion */
/* Boot protocol */
gp-register-num = <0x0>;
};
...@@ -13,7 +13,7 @@ ...@@ -13,7 +13,7 @@
/* arm_sp getter */ /* arm_sp getter */
#define arm__sp_getter(prop) arm_sp.prop #define arm__sp_getter(prop) arm_sp.prop
#define ARM_SP_MAX_SIZE U(0x10000) #define ARM_SP_MAX_SIZE U(0x80000)
struct arm_sp_t { struct arm_sp_t {
unsigned int number_of_sp; unsigned int number_of_sp;
......
/*
* Copyright (c) 2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/dts-v1/;
#define AFF 00
#include "fvp-defs.dtsi"
#undef POST
#define POST \
};
/ {
compatible = "arm,ffa-core-manifest-1.0";
#address-cells = <2>;
#size-cells = <1>;
attribute {
spmc_id = <0x8000>;
maj_ver = <0x1>;
min_ver = <0x0>;
exec_state = <0x0>;
load_address = <0x0 0x6000000>;
entrypoint = <0x0 0x6000000>;
binary_size = <0x80000>;
};
chosen {
linux,initrd-start = <0>;
linux,initrd-end = <0>;
};
hypervisor {
compatible = "hafnium,hafnium";
vm1 {
is_ffa_partition;
debug_name = "op-tee";
load_address = <0x6280000>;
smc_whitelist = <0xbe000000>;
};
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
CPU_0
/*
* SPMC(Hafnium) requires secondary core nodes are declared
* in descending order.
*/
CPU_7
CPU_6
CPU_5
CPU_4
CPU_3
CPU_2
CPU_1
};
memory@60000000 {
device_type = "memory";
reg = <0x0 0x6000000 0x2000000>; /* Trusted DRAM */
};
};
...@@ -75,6 +75,12 @@ ...@@ -75,6 +75,12 @@
secure-partitions { secure-partitions {
compatible = "arm,sp"; compatible = "arm,sp";
#ifdef OPTEE_SP_FW_CONFIG
op-tee {
uuid = <0xe0786148 0xe311f8e7 0x02005ebc 0x1bc5d5a5>;
load-address = <0x6280000>;
};
#else
cactus-primary { cactus-primary {
uuid = <0x1e67b5b4 0xe14f904a 0x13fb1fb8 0xcbdae1da>; uuid = <0x1e67b5b4 0xe14f904a 0x13fb1fb8 0xcbdae1da>;
load-address = <0x7000000>; load-address = <0x7000000>;
...@@ -84,6 +90,7 @@ ...@@ -84,6 +90,7 @@
uuid = <0x092358d1 0xb94723f0 0x64447c82 0xc88f57f5>; uuid = <0x092358d1 0xb94723f0 0x64447c82 0xc88f57f5>;
load-address = <0x7100000>; load-address = <0x7100000>;
}; };
#endif
}; };
#if COT_DESC_IN_DTB #if COT_DESC_IN_DTB
......
...@@ -253,8 +253,13 @@ $(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) ...@@ -253,8 +253,13 @@ $(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
endif endif
ifeq (${SPD},spmd) ifeq (${SPD},spmd)
FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb ifeq ($(ARM_SPMC_MANIFEST_DTS),)
ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
endif
FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
# Add the TOS_FW_CONFIG to FIP and specify the same to certtool # Add the TOS_FW_CONFIG to FIP and specify the same to certtool
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) $(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
......
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