- 17 Jun, 2019 27 commits
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Marek Vasut authored
Use common qos_regs.h instead of a local copy in the E3 QoS init. No functional change. Signed-off-by:Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ia4336d4b6173e1dbb671a003d904dbc5dc0c196d
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Marek Vasut authored
Replace the remaining ad-hoc register addresses with proper macros. Signed-off-by: -
Marek Vasut authored
The DBSC_SCFCTST2 is always written with the same value, no matter what the MD pin value is, drop the entire check and just write the register with the one and only possible value. Signed-off-by: -
Marek Vasut authored
Move the DBSC write enabling and disabling to dbsc_setting() function, to make it local, instead of having it all over the code. Signed-off-by: -
Marek Vasut authored
Drop useless comments in dbsc_setting(). No functional change. Signed-off-by: -
Marek Vasut authored
Convert the mstat table from a complex structure to simple sequence of uint64_t values, since the structure described just that and the loop can operate over incrementing sequence of addresses just fine. Signed-off-by: -
Marek Vasut authored
Pull out the mstat fix array into separate file, to align the structure of the driver with the other SoCs. No functional change. Signed-off-by: -
Marek Vasut authored
Use common qos_regs.h instead of a local copy in the D3 QoS init. Fill missing registers into qos_regs.h . No functional change. Signed-off-by: -
Marek Vasut authored
Fix checkpatch issues, clean up macro indentation. No functional change. Signed-off-by: -
Marek Vasut authored
The DBSC_SCFCTST2 is always written with the same value, no matter what the MD pin value is, drop the entire check and just write the register with the one and only possible value. Signed-off-by: -
Marek Vasut authored
Drop useless comments in dbsc_setting(). No functional change. Signed-off-by: -
Marek Vasut authored
The extra level of nesting is not necessary, drop it. No functional change. Signed-off-by: -
Marek Vasut authored
Use common qos_regs.h instead of a local copy in the M3N QoS init. No functional change. Signed-off-by: -
Marek Vasut authored
Fix checkpatch issues, clean up macro indentation. No functional change. Signed-off-by: -
Marek Vasut authored
The DBSC_SCFCTST2 is always written with the same value, no matter what the MD pin value is, drop the entire check and just write the register with the one and only possible value. Signed-off-by: -
Marek Vasut authored
Drop useless comments in dbsc_setting(). No functional change. Signed-off-by: -
Marek Vasut authored
The extra level of nesting is not necessary, drop it. No functional change. Signed-off-by: -
Marek Vasut authored
Convert the mstat table from a complex structure to simple sequence of uint64_t values, since the structure described just that and the loop can operate over incrementing sequence of addresses just fine. Signed-off-by: -
Marek Vasut authored
Pull out the mstat fix array into separate file, to align the structure of the driver with the other SoCs. No functional change. Signed-off-by: -
Marek Vasut authored
Use common qos_regs.h instead of a local copy in the M3W QoS init. Fill missing registers into qos_regs.h . No functional change. Signed-off-by: -
Marek Vasut authored
Fix checkpatch issues, clean up macro indentation. No functional change. Signed-off-by: -
Marek Vasut authored
The DBSC_SCFCTST2 is always written with the same value, no matter what the MD pin value is, drop the entire check and just write the register with the one and only possible value. Signed-off-by: -
Marek Vasut authored
Drop useless comments in dbsc_setting(). No functional change. Signed-off-by: -
Marek Vasut authored
The extra level of nesting is not necessary, drop it. No functional change. Signed-off-by: -
Marek Vasut authored
Convert the mstat table from a complex structure to simple sequence of uint64_t values, since the structure described just that and the loop can operate over incrementing sequence of addresses just fine. Signed-off-by: -
Marek Vasut authored
Pull out the mstat fix array into separate file, to align the structure of the driver with the other SoCs. No functional change. Signed-off-by: -
Marek Vasut authored
Use common qos_regs.h instead of a local copy in the H3 QoS init. Fill missing registers into qos_regs.h . No functional change. Signed-off-by:
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- 21 May, 2019 1 commit
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Yoshifumi Hosoya authored
Update M3 Ver.3.0 QoS setting rev.0.03. Change-Id: I892521d456c606ac3d30f2b2ac6b4e16faa5fc48 Signed-off-by:
Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by:
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- 11 Apr, 2019 2 commits
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Chiaki Fujii authored
[IPL/DDR] - Update DDR setting rev.0.35. Signed-off-by:Chiaki Fujii <chiaki.fujii.wj@renesas.com> Change-Id: I2b936ca8621ca320cc97353f99240da5f24781f7
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Yoshifumi Hosoya authored
Subslot cycle from 132 to 126 as default setting. Subslot cycle from 264 to 252. [IPL/QoS] - Update H3 Ver.2.0 QoS setting rev.0.21. - Update H3 Ver.3.0 QoS setting rev.0.11. - Update M3 Ver.1.1 QoS setting rev.0.19. - Update M3 Ver.3.0 QoS setting rev.0.02. - Update M3N Ver.1.1 QoS setting rev.0.09. Signed-off-by:
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- 03 Apr, 2019 1 commit
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Ambroise Vincent authored
Now it is needed to use the full path of the common header files. Commit 09d40e0e ("Sanitise includes across codebase") provides more information. Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647 Signed-off-by:
Ambroise Vincent <ambroise.vincent@arm.com>
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- 02 Apr, 2019 4 commits
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Valentine Barshak authored
Add R-Car V3M support. This is based on the original V3M support patch for Yocto v2.23.1 by Vladimir Barinov. Signed-off-by:
Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by:
Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by:
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Marek Vasut authored
Add QoS tables for R-Car D3 SoC. Signed-off-by: -
Marek Vasut authored
Add PFC tables for R-Car D3 SoC. Signed-off-by: -
Marek Vasut authored
Add R-Car D3 DDR initialization code. The code is in staging and needs cleanup, and possibly can even be merged with the E3 init code. Signed-off-by:
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- 04 Mar, 2019 2 commits
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Marek Vasut authored
Configure the GPIO5 09 pin as input on the ULCB board by default, since the pin is routed on the expansion connector and not connected to anything by default. Signed-off-by: -
Marek Vasut authored
Add support for the M3W 3.0 SoC and synchronize the upstream ATF with Renesas downstream ATF release v2.0.1. Signed-off-by:
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- 29 Jan, 2019 1 commit
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Marek Vasut authored
Clean up the NOTICE() and FATAL_MSG() outputs, so that they contain proper newlines and BL2 prefixes. Signed-off-by:
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- 08 Jan, 2019 2 commits
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Marek Vasut authored
Synchronize the QoS tables with Renesas ATF release 2.0.0 . Signed-off-by: -
Marek Vasut authored
Synchronize the pin control tables with Renesas ATF release 2.0.0 . Signed-off-by:
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