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Use the console_pl011_core_* functions directly in the crash console
callbacks.

This bypasses the MULTI_CONSOLE_API for the crash console (UART1), but
allows using the crash console before the C runtime has been initialized
(eg to call ASM_ASSERT). This retains backwards compatibility with respect
to functionality when the old API is used.

Use the MULTI_CONSOLE_API to register UART0 as the boot and runtime
console.

Fixes ARM-software/tf-issues#572
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>

qemu: MULTI_CONSOLE_API=0 causes build error

Add crash_console_init declaration to console.h
Only enable MULTI_CONSOLE_API for AArch64

Fixes ARM-software/tf-issues#571
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>

plat/hikey: split boot memory layout to dedicated file

Merge pull request #1324 from michpappas/tf-issues#567Platforms_cannot_override_ENABLE_STACK_PROTECTOR

Platforms cannot override ENABLE_STACK_PROTECTOR

Trusty: Fix sanity check on NS entry point

qemu: Support MULTI_CONSOLE_API

FVP: change the method for translating MPIDR values to a linear indices

stdlib: remove comparison with EOF macro to comply with MISRA 

Add support for the new MULTI_CONSOLE_API

Crash information is now displayed in both the runtime and crash consoles,
if a crash occurs after the runtime console has been enabled

Enable MULTI_CONSOLE_API by default on qemu builds

Fixes ARM-software/tf-issues#561
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>

Don't make build results depend on dependency files

Change PLATFORM_ROOT to TF_PLATFORM_ROOT

Rename 'smcc' to 'smccc'

tegra: Use SPDX license identifier

When the source code says 'SMCC' it is talking about the SMC Calling
Convention. The correct acronym is SMCCC. This affects a few definitions
and file names.

Some files have been renamed (smcc.h, smcc_helpers.h and smcc_macros.S)
but the old files have been kept for compatibility, they include the
new ones with an ERROR_DEPRECATED guard.

Change-Id: I78f94052a502436fdd97ca32c0fe86bd58173f2f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

This patch fixes the sanity check on the non-secure entrypoint value
returned by bl31_plat_get_next_image_ep_info(). This issue has been
reported by Coverity Scan Online:

  CID 264893 (#1 of 1): Dereference null return value (NULL_RETURNS)
  Dereferencing a null pointer ns_ep_info.

Change-Id: Ia0f64d8c8b005f042608f1422ecbd42bc90b2fb4
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

Release v1.5: Update minor version number to 5

Update readme.rst for v1.5 release

Update user guide

Following Out of Box testing for v1.5 release:

    Update host OS version to Ubuntu 16.04
    Clarify configuration files needed for checkpatch
    Add note on using Linaro precompiled binaries

Change-Id: Ia4ae61e01128ddff1a288972ddf84b79370fa52c
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>

Include stack_protector's makefile after including platform.mk
to allow platforms override ENABLE_STACK_PROTECTOR

Fixes ARM-software/tf-issues#567
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>

Change-Id: Id9bd0c20a5af4f41269a51a675018dcc59e93f6c
Signed-off-by: Dan Handley <dan.handley@arm.com>

x3 will be assigned by the folloing instructions.
So the first instruction is not needed any more.

old method:
  (ClusterId * FVP_MAX_CPUS_PER_CLUSTER)
+ (CPUId * FVP_MAX_PE_PER_CPU)
+ ThreadId

it should be
  (ClusterId * FVP_MAX_CPUS_PER_CLUSTER) * FVP_MAX_PE_PER_CPU
+ (CPUId * FVP_MAX_PE_PER_CPU)
+ ThreadId

which can be simplified as:
(ClusterId * FVP_MAX_CPUS_PER_CLUSTER + CPUId) * FVP_MAX_PE_PER_CPU + ThreadId
Signed-off-by: Wang Feng <feng_feng.wang@spreadtrum.com>

Change-Id: Ib215150272acc2ecec43f9b69624ebbbd5d7492d
Signed-off-by: David Cunado <david.cunado@arm.com>

Docs: Update various for v1.5 release

The CI has been updated to run tests against the AEMv8-A RevC
model, FVP_Base_RevC-2xAEMv8A, which is available from the Fast
Model releases on Connected Community [1].

Additionally, the CI now also includes the Cortex-A55x4, Cortex-A75x4
and Cortex-A55x4-A75x4 Base models.

[1] https://developer.arm.com/products/system-design/fixed-virtual-platforms



Change-Id: I57806f3b2a8121211490a7aa0089dcae566d8635
Signed-off-by: David Cunado <david.cunado@arm.com>

Updated change-log.rst with summary of changes since
release v1.4.

Change-Id: I56b5a30d13a5a7099942535cbaeff0e2a5c5804e
Signed-off-by: David Cunado <david.cunado@arm.com>

Update Arm Trusted Firmware references in the upstream documents to
Trusted Firmware-A (TF-A). This is for consistency with and
disambiguation from Trusted Firmware-M (TF-M).

Also update other Arm trademarks, e.g. ARM->Arm, ARMv8->Armv8-A.

Change-Id: I8bb0e18af29c6744eeea2dc6c08f2c10b20ede22
Signed-off-by: Dan Handley <dan.handley@arm.com>
Signed-off-by: David Cunado <david.cunado@arm.com>

Docs: Update design guide for dynamic config

FVP AArch32: Fix flash access in BL32 for mem_protect

Ensures compliance with MISRA C-2012 Rule 22.7

Change-Id: Ifbe0926a24ba0dca18174e1aa87313a63bba50fb
Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>

The FVP platform port for SP_MIN (BL32) didn't map the flash memory
in BL32 for stroring the mem_protect enable state information leading
to synchronous exception. The patch fixes it by adding the region to
the BL32 mmap tables.

Change-Id: I37eec83c3e1ea43d1b5504d3683eebc32a57eadf
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>

Implement support for v1.2 of firmware interfaces spec (ARM DEN 0070A)

When querying `SMCCC_ARCH_WORKAROUND_1` through `SMCCC_ARCH_FEATURES`,
return either:
  * -1 to indicate the PE on which `SMCCC_ARCH_FEATURES` is called
    requires firmware mitigation for CVE-2017-5715 but the mitigation
    is not compiled in.
  * 0 to indicate that firmware mitigation is required, or
  * 1 to indicate that no firmware mitigation is required.

This patch complies with v1.2 of the firmware interfaces
specification (ARM DEN 0070A).

Change-Id: Ibc32d6620efdac6c340758ec502d95554a55f02a
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>

If the CSV2 field reads as 1 then branch targets trained in one
context cannot affect speculative execution in a different context.
In that case skip the workaround on Cortex A72 and A73.

Change-Id: Ide24fb6efc77c548e4296295adc38dca87d042ee
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>

This patch updates the `firmware-design.rst` document for
changes in ARM-TF for supporting dynamic configuration features
as presented in `Secure Firmware BoF SFO'17`[1].

The patch also updates the user-guide for 2 build options for FVP
pertaining to dynamic config.

[1] https://www.slideshare.net/linaroorg/bof-device-tree-and-secure-firmware-bof-sfo17310



Change-Id: Ic099cf41e7f1a98718c39854e6286d884011d445
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Boot memory layout is specific for a platform, but should not be
mixed up with other platform specific attributes. A separate file is
much cleaner and better to compare with other platforms. Take a look
at plat/poplar where it is done the same way.

Moved hikey_def.h to system include folder and moved includes from
hikey_def.h to more general platform_def.h.
Signed-off-by: Michael Brandl <git@fineon.pw>

Juno: Fixes for firmware update

Change-Id: I770b2db68c8d115d10067bb557e32b5e269c94a5
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>