- 19 Jul, 2018 3 commits
- 18 Jul, 2018 5 commits
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Soby Mathew authored
Add i.MX8QX/i.MX8QM power management feature
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Sandrine Bailleux authored
Change-Id: I98f23f6cebcf984b57efc5449b75ff702e1984a0 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Antonio Nino Diaz authored
Define the values as unsigned int or unsigned long long based on the actual size of the register. This prevents subtle issues caused by having a type that is too small. For example: #define OPTION_ENABLE 0x3 #define OPTION_SHIFT 32 uint64_t mask = OPTION_ENABLE << OPTION_SHIFT; Because OPTION_ENABLE fits in an int, the value is considered an int. This means that, after shifting it 32 places to the left, the final result is 0. The correct way to define the values is: #define OPTION_ENABLE ULL(0x3) #define OPTION_SHIFT U(32) In this case, the compiler is forced to use a 64 bit value from the start, so shifting it 32 places to the left results in the expected value. Change-Id: Ieaf2ffc2d8caa48c622db011f2aef549e713e019 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Ifea46da46d1bfd01b341acfad75df5bcab48a204 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Soby Mathew authored
Always compile debug macros
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- 16 Jul, 2018 1 commit
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Soby Mathew authored
rpi3: A few improvements
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- 15 Jul, 2018 3 commits
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Antonio Nino Diaz authored
This library can be used in other projects. All comments that talk about the Trusted Firmware should be talking about the library itself. Change-Id: I3b98d42f7132be72c1f8a4900acfaa78dbd2daa2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Instead of having a different initialization routine than the rest of the codebase, use the common implementation. Change-Id: I27c03b9905f3cf0af8810aad9e43092005387a1a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This allows other parts of the code to reuse it. No functional changes. Change-Id: Ib052ae235c422d9179958bd3016c3e678779ae9b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 14 Jul, 2018 2 commits
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Antonio Nino Diaz authored
Implement VideoCore mailbox interface driver and use it to get the board revision identifier. For now it is only used to print the model for debug purposes. This wiki contains the documentation of the mailbox interface: https://github.com/raspberrypi/firmware/wiki Change-Id: I11943b99b52cc1409f4a195ebe58eb44ae5b1d6c Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This implementation doesn't actually turn the system off, it simply reboots it and prevents it from booting while keeping it in a low power mode. Change-Id: I7f72c9f43f25ba0341db052bc2be4774c88a7ea3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 13 Jul, 2018 9 commits
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Antonio Nino Diaz authored
Add a new default makefile target to concatenate BL1 and the FIP and generate armstub8.bin. This way it isn't needed to do it manually. Documentation updated to reflect the changes. Change-Id: Id5b5b1b7b9f87767db63fd01180ddfea855a7207 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Dimitris Papastamos authored
CSS: Add support for SCMI AP core config protocol
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Antonio Nino Diaz authored
Most registers are 64-bit wide, even in AArch32 mode: - MAIR_ELx is equivalent to MAIR0 and MAIR1. - TTBR is 64 bit in both AArch64 and AArch32. The only difference is the TCR register, which is 32 bit in AArch32 and in EL3 in AArch64. For consistency with the rest of ELs in AArch64, it makes sense to also have it as a 64-bit value. Change-Id: I2274d66a28876702e7085df5f8aad0e7ec139da9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The Exception Level is now detected at runtime. This means that it is not needed to hardcode the EL used by each image. This doesn't result in a substantial increase of the image size because the initialization functions that aren't used are garbage-collected by the linker. In AArch32 the current EL has been changed from EL3 to EL1 because the the AArch32 PL1&0 translation regime behaves more like the AArch64 EL1&0 translation regime than the EL3 one. Change-Id: I941404299ebe7666ca17619207c923b49a55cb73 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
xlat_arch_tlbi_va_regime() isn't used, so it has been renamed to xlat_arch_tlbi_va() and the previous implementation has been removed. Change-Id: Ic118bed3fb68234748d86b2e9e95b25650289276 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
They only contained one function that is easily integrated in the private library header and the existing architectural C files. This also helps making the library more portable, as the Makefile of the library now doesn't use the variable INCLUDES, which is specific to this codebase and doesn't respect the namespace of the library. Change-Id: I22228e6a97e9b4f346f5cd8947609263e8df71d8 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Sandrine Bailleux authored
With commit cf24229e ("Run compiler on debug macros for type checking"), the compiler will now always evaluate INFO() macro calls, no matter the LOG_LEVEL value. Therefore, any variable referenced in the macro has to be be defined. Address this issue by removing the local variable and using the expression it was assigned directly in the INFO() call. Change-Id: Iedc23b3538c1e162372e85390881e50718e50bf3 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
Fix mismatches between the format specifier and the corresponding variable type. Change-Id: Ib9004bd9baa9ba24a50000bea4f2418e1bf7e743 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
Even if the log output is too low for a message to be printed out on the console by the debug macros, it should still be evaluated by the compiler to get some type checking and validation of the format specifiers. To do so, introduce the no_tf_log() macro that encloses the call to tf_log() in an always-false condition. This avoids the problem of discovering build issues only when we build the firmware with the right LOG_LEVEL value. Change-Id: Ic0fd252ab691d0187fd925756a4837aca1cbfd7b Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 12 Jul, 2018 15 commits
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Dimitris Papastamos authored
[RFC] Add MMC framework
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Dimitris Papastamos authored
rpi3: enlarge SEC_DRAM0_SIZE for optee_test to pass
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Dimitris Papastamos authored
rpi3: Implement simple interrupt routing
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Dimitris Papastamos authored
Fix some violations to MISRA rules 8.3, 8.4, 8.5, 8.8
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Dimitris Papastamos authored
Change-Id: Iaebbeac1a1d6fbd531e5694b95ed068b7a193e62 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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Dimitris Papastamos authored
Change-Id: If07000b6b19011e960336a305a784dd643301b97 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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Anson Huang authored
Add domain suspend/resume support, Linux kernel can "echo mem > /sys/power/state" to put system into suspend mode, all CPUs and cluster will be powered off and can be waked up if irq pending in GIC, tested on i.MX8QM MEK board. Since the power state has been implemented, switch to use standard power state for CCI operations instead of private cpu use count in i.MX8QM. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add domain off support for Linux kernel's cpu hot-plug feature, when there are cpu off request from Linux kernel, TF-A will send command to system controller to do CPU power gate accordingly, tested on i.MX8QM MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add system reset support for i.MX8QM, when Linux kernel issues "reboot" command, TF-A will send command to inform system controller to reset whole board according to board design, tested on i.MX8QM MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add system power off support for i.MX8QM, when Linux kernel issues "poweroff" command, TF-A will send command to inform system controller to power off whole board according to board design, tested on i.MX8QM MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add domain suspend/resume support, Linux kernel can "echo mem > /sys/power/state" to put system into suspend mode, all CPUs and cluster will be powered off and can be waked up if irq pending in GIC, tested on i.MX8QX MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Ying-Chun Liu (PaulLiu) authored
Running optee_test failed because SEC_DRAM0_SIZE is too small. Previous is 2 MB. We enlarge it to 11 MB for passing the test. Also we reduce the NS_DRAM0_SIZE from 13MB to 4MB so that the whole section is still fit in 16MB. This commit also modified the document to reflect the changes we've made in code. Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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Anson Huang authored
Add domain off support for Linux kernel's cpu hot-plug feature, when there are cpu off request from Linux kernel, TF-A will send command to system controller to do CPU power gate accordingly. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add system reset support for i.MX8QX, when Linux kernel issues "reboot" command, TF-A will send command to inform system controller to reset whole board according to board design, tested on i.MX8QX MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add system power off support for i.MX8QX, when Linux kernel issues "poweroff" command, TF-A will send command to inform system controller to power off whole board according to board design, tested on i.MX8QX MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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- 11 Jul, 2018 2 commits
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Antonio Nino Diaz authored
Implement minimal interrupt routing functions. All interrupts are treated as non-secure interrupts to be handled by the non-secure world. Add note to the documentation about disabling FIQs qhen using OP-TEE with Linux. Change-Id: I937096542d973925e43ae946c5d0b306d0d95a94 Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Sandrine Bailleux authored
The ARM_INSTANTIATE_LOCK macro defines a lock meant to be further manipulated using the arm_lock_init/get/release() macros. It has 2 variants, depending on the BL image it is compiled for. One version defines the lock variable with internal linkage whereas the other one, with external linkage. Code that uses these macros is not compliant with MISRA rule 8.4 because when using the external linkage version, there is no visible declaration for the lock variable. This patch defines the arm_lock variable with internal linkage in both cases. This fits well the way these macros are used in the code today, where the lock is not used outside of the translation unit it is defined in. Change-Id: I213a74a2a6088a4f1e9a61a319ca7579c2001320 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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