1. 25 Mar, 2020 1 commit
  2. 27 Feb, 2020 1 commit
    • Louis Mayencourt's avatar
      fconf: Fix misra issues · 845db722
      Louis Mayencourt authored
      
      
      MISRA C-2012 Rule 20.7:
      Macro parameter expands into an expression without being wrapped by parentheses.
      
      MISRA C-2012 Rule 12.1:
      Missing explicit parentheses on sub-expression.
      
      MISRA C-2012 Rule 18.4:
      Essential type of the left hand operand is not the same as that of the right
      operand.
      
      Include does not provide any needed symbols.
      
      Change-Id: Ie1c6451cfbc8f519146c28b2cf15c50b1f36adc8
      Signed-off-by: default avatarLouis Mayencourt <louis.mayencourt@arm.com>
      845db722
  3. 10 Feb, 2020 1 commit
  4. 07 Feb, 2020 4 commits
    • Louis Mayencourt's avatar
      fconf: Add mbedtls shared heap as property · 6c972317
      Louis Mayencourt authored
      
      
      Use the firmware configuration framework in arm dynamic configuration
      to retrieve mbedtls heap information between bl1 and bl2.
      
      For this, a new fconf getter is added to expose the device tree base
      address and size.
      
      Change-Id: Ifa5ac9366ae100e2cdd1f4c8e85fc591b170f4b6
      Signed-off-by: default avatarLouis Mayencourt <louis.mayencourt@arm.com>
      6c972317
    • Louis Mayencourt's avatar
      fconf: Add TBBR disable_authentication property · ce852841
      Louis Mayencourt authored
      
      
      Use fconf to retrieve the `disable_authentication` property.
      Move this access from arm dynamic configuration to bl common.
      
      Change-Id: Ibf184a5c6245d04839222f5457cf5e651f252b86
      Signed-off-by: default avatarLouis Mayencourt <louis.mayencourt@arm.com>
      ce852841
    • Louis Mayencourt's avatar
      fconf: Add dynamic config DTBs info as property · 25ac8794
      Louis Mayencourt authored
      
      
      This patch introduces a better separation between the trusted-boot
      related properties, and the dynamic configuration DTBs loading
      information.
      
      The dynamic configuration DTBs properties are moved to a new node:
      `dtb-registry`. All the sub-nodes present will be provided to the
      dynamic config framework to be loaded. The node currently only contains
      the already defined configuration DTBs, but can be extended for future
      features if necessary.
      The dynamic config framework is modified to use the abstraction provided
      by the fconf framework, instead of directly accessing the DTBs.
      
      The trusted-boot properties are kept under the "arm,tb_fw" compatible
      string, but in a separate `tb_fw-config` node.
      The `tb_fw-config` property of the `dtb-registry` node simply points
      to the load address of `fw_config`, as the `tb_fw-config` is currently
      part of the same DTB.
      
      Change-Id: Iceb6c4c2cb92b692b6e28dbdc9fb060f1c46de82
      Signed-off-by: default avatarLouis Mayencourt <louis.mayencourt@arm.com>
      25ac8794
    • Louis Mayencourt's avatar
      fconf: Load config dtb from bl1 · 3b5ea741
      Louis Mayencourt authored
      
      
      Move the loading of the dtb from arm_dym_cfg to fconf. The new loading
      function is not associated to arm platform anymore, and can be moved
      to bl_main if wanted.
      
      Change-Id: I847d07eaba36d31d9d3ed9eba8e58666ea1ba563
      Signed-off-by: default avatarLouis Mayencourt <louis.mayencourt@arm.com>
      3b5ea741
  5. 19 Dec, 2019 1 commit
  6. 09 Dec, 2019 1 commit
    • Louis Mayencourt's avatar
      Use the proper size for tb_fw_cfg_dtb · 6c77dfc5
      Louis Mayencourt authored
      
      
      Currently tb_fw_cfg_dtb size is fixed to max, which is generally a page
      (but depend on the platform). Instead, read the actual size of the dtb
      with the libfdt "fdt_totalsize" function.
      This avoid flushing extra memory after updating the dtb with mbedtls
      heap information when shared heap is used.
      
      Change-Id: Ibec727661116429f486464a0c9f15e9760d7afe2
      Signed-off-by: default avatarLouis Mayencourt <louis.mayencourt@arm.com>
      6c77dfc5
  7. 19 Feb, 2019 1 commit
    • Usama Arif's avatar
      plat/arm: Introduce FVP Versatile Express platform. · 6393c787
      Usama Arif authored
      
      
      This patch adds support for Versatile express FVP (Fast models).
      Versatile express is a family of platforms that are based on ARM v7.
      Currently this port has only been tested on Cortex A7, although it
      should work with other ARM V7 cores that support LPAE, generic timers,
      VFP and hardware divide. Future patches will support other
      cores like Cortex A5 that dont support features like LPAE
      and hardware divide. This platform is tested on and only expected to
      work on single core models.
      
      Change-Id: I10893af65b8bb64da7b3bd851cab8231718e61dd
      Signed-off-by: default avatarUsama Arif <usama.arif@arm.com>
      6393c787
  8. 25 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      plat/arm: Sanitise includes · bd9344f6
      Antonio Nino Diaz authored
      
      
      Use full include paths like it is done for common includes.
      
      This cleanup was started in commit d40e0e08283a ("Sanitise includes
      across codebase"), but it only cleaned common files and drivers. This
      patch does the same to Arm platforms.
      
      Change-Id: If982e6450bbe84dceb56d464e282bcf5d6d9ab9b
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      bd9344f6
  9. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  10. 01 Nov, 2018 1 commit
  11. 28 Sep, 2018 1 commit
  12. 07 Sep, 2018 2 commits
    • John Tsichritzis's avatar
      Add cache flush after BL1 writes heap info to DTB · 63cc2658
      John Tsichritzis authored
      
      
      A cache flush is added in BL1, in Mbed TLS shared heap code. Thus, we
      ensure that the heap info written to the DTB always gets written back to
      memory.  Hence, sharing this info with other images is guaranteed.
      
      Change-Id: I0faada31fe7a83854cd5e2cf277ba519e3f050d5
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      63cc2658
    • John Tsichritzis's avatar
      Additional runtime check for DTB presence in BL2 · a606031e
      John Tsichritzis authored
      
      
      In Mbed TLS shared heap code, an additional sanity check is introduced
      in BL2. Currently, when BL2 shares heap with BL1, it expects the heap
      info to be found in the DTB. If for any reason the DTB is missing, BL2
      cannot have the heap address and, hence, Mbed TLS cannot proceed. So,
      BL2 cannot continue executing and it will eventually crash.  With this
      change we ensure that if the DTB is missing BL2 will panic() instead of
      having an unpredictable crash.
      
      Change-Id: I3045ae43e54b7fe53f23e7c2d4d00e3477b6a446
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      a606031e
  13. 04 Sep, 2018 1 commit
    • John Tsichritzis's avatar
      Support shared Mbed TLS heap for FVP · ba597da7
      John Tsichritzis authored
      
      
      This patch introduces the shared Mbed TLS heap optimisation for Arm
      platforms. The objective is the Mbed TLS heap to be shared between BL1
      and BL2 so as to not allocate the heap memory twice. To achieve that,
      the patch introduces all the necessary helpers for implementing this
      optimisation. It also applies it for FVP.
      
      Change-Id: I6d85eaa1361517b7490956b2ac50f5fa0d0bb008
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      ba597da7
  14. 23 Aug, 2018 1 commit
  15. 15 Jun, 2018 1 commit
    • John Tsichritzis's avatar
      Panic in BL1 when TB_FW_CONFIG is invalid · 355e0967
      John Tsichritzis authored
      
      
      In Arm platforms, when using dynamic configuration, the necessary
      parameters are made available as a DTB. The DTB is loaded by BL1 and,
      later on, is parsed by BL1, BL2 or even both, depending on when
      information from the DTB is needed.
      
      When the DTB is going to be parsed, it must be validated first, to
      ensure that it is properly structured. If an invalid DTB is detected
      then:
        - BL1 prints a diagnostic but allows execution to continue,
        - BL2 prints a diagnostic and panics.
      
      Now the behaviour of BL1 is changed so for it also to panic. Thus, the
      behaviour of BL1 and BL2 is now similar.
      
      Keep in mind that if BL1 only loads the DTB but it doesn't need to
      read/write it, then it doesn't validate it. The validation is done only
      when the DTB is actually going to be accessed.
      
      Change-Id: Idcae6092e6dbeab7248dd5e041d6cbb7784fe410
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      355e0967
  16. 07 Jun, 2018 1 commit
    • Soby Mathew's avatar
      ARM platforms: Move BL31 below BL2 to enable BL2 overlay · c099cd39
      Soby Mathew authored
      
      
      The patch changes the layout of BL images in memory to enable
      more efficient use of available space. Previously BL31 was loaded
      with the expectation that BL2 memory would be reclaimed by BL32
      loaded in SRAM. But with increasing memory requirements in the
      firmware, we can no longer fit BL32 in SRAM anymore which means the
      BL2 memory is not reclaimed by any runtime image. Positioning BL2
      below BL1-RW and above BL31 means that the BL31 NOBITS can be
      overlaid on BL2 and BL1-RW.
      
      This patch also propogates the same memory layout to BL32 for AArch32
      mode. The reset addresses for the following configurations are also
      changed :
         * When RESET_TO_SP_MIN=1 for BL32 in AArch32 mode
         * When BL2_AT_EL3=1 for BL2
      
      The restriction on BL31 to be only in DRAM when SPM is enabled
      is now removed with this change. The update to the firmware design
      guide for the BL memory layout is done in the following patch.
      
      Change-Id: Icca438e257abe3e4f5a8215f945b9c3f9fbf29c9
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      c099cd39
  17. 21 May, 2018 1 commit
    • Soby Mathew's avatar
      FVP: Add dummy configs for BL31, BL32 and BL33 · 1d71ba14
      Soby Mathew authored
      
      
      This patch adds soc_fw_config, tos_fw_config and nt_fw_config to the FVP.
      The config files are placeholders and do not have any useful bindings
      defined. The tos_fw_config is packaged in FIP and loaded by BL2 only
      if SPD=tspd. The load address of these configs are specified in tb_fw_config
      via new bindings defined for these configs. Currently, in FVP, the
      soc_fw_config and tos_fw_config is loaded in the page between BL2_BASE
      and ARM_SHARED_RAM. This memory was typically used for BL32 when
      ARM_TSP_RAM_LOCATION=tsram but since we cannot fit BL32 in that
      space anymore, it should be safe to use this memory for these configs.
      There is also a runtime check in arm_bl2_dyn_cfg_init() which ensures
      that this overlap doesn't happen.
      
      The previous arm_dyn_get_hwconfig_info() is modified to accept configs
      other than hw_config and hence renamed to arm_dyn_get_config_load_info().
      The patch also corrects the definition of ARM_TB_FW_CONFIG_LIMIT to be
      BL2_BASE.
      
      Change-Id: I03a137d9fa1f92c862c254be808b8330cfd17a5a
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      1d71ba14
  18. 18 May, 2018 1 commit
    • Soby Mathew's avatar
      FVP: Enable capability to disable auth via dynamic config · 6e79f9fd
      Soby Mathew authored
      
      
      This patch adds capability to FVP to disable authentication dynamically
      via the `disable_auth` property in TB_FW_CONFIG. Both BL1 and BL2 parses
      the TB_FW_CONFIG for the `disable_auth` property and invokes the
      `load_dyn_disable_auth()` API to disable authentication if the
      property is set to 1. The DYN_DISABLE_AUTH is enabled by default for
      FVP as it is a development platform. Note that the TB_FW_CONFIG has to
      be authenticated by BL1 irrespective of these settings.
      
      The arm_bl2_dyn_cfg_init() is now earlier in bl2_plat_preload_setup()
      rather than in bl2_platform_setup() as we need to get the value of
      `disable_auth` property prior to authentication of any image by BL2.
      
      Change-Id: I734acd59572849793e5020ec44c6ac51f654a4d1
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      6e79f9fd
  19. 26 Feb, 2018 3 commits
    • Soby Mathew's avatar
      Dynamic cfg: MISRA fixes · da5f2745
      Soby Mathew authored
      
      
      Change-Id: I1d85b76af002b8b672fcaeca94939b7420bc8243
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      da5f2745
    • Soby Mathew's avatar
      ARM Platforms: Load HW_CONFIG in BL2 · cab0b5b0
      Soby Mathew authored
      
      
      The patch adds the necessary changes to load HW_CONFIG in BL2 for
      ARM Platforms :
      
      1. The load address of HW_CONFIG is specified via the `hw_config_addr`
      property in TB_FW_CONFIG is loaded by BL1. The `hw_config_max_size`
      property defines the maximum size to be expected for the HW_CONFIG.
      The `arm_dyn_cfg_helpers.c` and corresponding header implements
      utility functions to parse these DT properties defined.
      The `arm_dyn_cfg.c` implements wrappers to these helpers to enable
      them to be invoked from ARM platform layer.
      
      2. `HW_CONFIG` is added to the `bl2_mem_params_descs[]` array which is
      the list of images to be loaded by BL2.
      
      3. The `libfdt` sources are now included when BL2 is built
      
      4. A new helper `populate_next_bl_params_config()` is introduced in
      desc_image_load.c to populate the subsequent executable BL images
      with the `hw_config` and the corresponding `fw_config` if available.
      The `plat_get_next_bl_params()` API for ARM platforms is modified to
      invoke this new helper.
      
      5. The implementation of `bl2_early_platform_setup2()` is modified to
      consider `arg0` as well in addition to `arg1` passed from BL1.
      
      6. Bump up the BL2 size for Juno to accommodate the inclusion of libfdt.
      
      Change-Id: I80f1554adec41753e0d179a5237364f04fe13a3f
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      cab0b5b0
    • Soby Mathew's avatar
      ARM Platorms: Load TB_FW_CONFIG in BL1 · c228956a
      Soby Mathew authored
      
      
      This patch modifies the bl1_platform_setup() API to load and authenticate
      TB_FW_CONFIG in BL1. The load address of the same is passed on to BL2 in
      `arg0` of entrypoint info. The fvp_io_storage.c and arm_io_storage.c also
      adds entries corresponding to TB_FW_CONFIG. A helper function
      `arm_load_tb_fw_config()` is added to load and authenticate TB_FW_CONFIG
      if present.
      
      Change-Id: Ie7bce667b3fad2b1a083bbcbc0a773f9f04254b1
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      c228956a