1. 21 May, 2021 1 commit
    • Igor Opaniuk's avatar
      feat(plat/imx8m): add SiP call for secondary boot · 9ce232fe
      Igor Opaniuk authored
      In iMX8MM it is possible to have two copies of bootloader in
      SD/eMMC and switch between them. The switch is triggered either
      by the BootROM in case the bootloader image is faulty OR can be
      enforced by the user. To trigger that switch the
      PERSIST_SECONDARY_BOOT bit should be set in GPR10 SRC register.
      As the bit is retained after WARM reset, that permits to control
      BootROM behavior regarding what boot image it will boot after
      reset: primary or secondary.
      
      This is useful for reliable bootloader A/B updates, as it permits
      switching between two copies of bootloader at different offsets of
      the same storage.
      
      If the PERSIST_SECONDARY_BOOT is 0, the boot ROM uses address
      0x8400 for the primary image. If the PERSIST_SECONDARY_BOOT is 1,
      the boot ROM reads that secondary image table from address 0x8200
      on the boot media and uses the address specified in the table for
      the secondary image.
      
      Secondary Image Table contains the sector of secondary bootloader
      image, exluding the offset to that image (explained below in the
      note). To generate the Secondary Image Table, use e.g.:
      $ printf '\x0\x0\x0\x0\x0\x0\x0\x0\x33\x22\x11'
               '\x00\x00\x10\x0\x0\x00\x0\x0\x0'
        > /tmp/sit.bin
      $ hexdump  -vC /tmp/sit.bin
        00000000  00 00 00 00
        00000004  00 00 00 00
        00000008  33 22 11 00 <--- This is the "tag"
        0000000c  00 10 00 00 <--- This is the "firstSectorNumber"
        00000010  00 00 00 00
      
      You can also use NXP script from [1][2] imx-mkimage tool for
      SIT generation. Note that the firstSectorNumber is NOT the offset
      of the IVT, but an offset of the IVT decremented by Image Vector
      Table offset (Table 6-25. Image Vector Table Offset and Initial
      Load Region Size for iMX8MM/MQ), so for secondary SPL copy at
      offset 0x1042 sectors, firstSectorNumber must be 0x1000
      (0x42 sectors * 512 = 0x8400 bytes offset).
      
      In order to test redundant boot board should be closed and
      SD/MMC manufacture mode disabled, as secondary boot is not
      supported in the SD/MMC manufacture mode, which can be disabled
      by blowing DISABLE_SDMMC_MFG (example for iMX8MM):
      > fuse prog -y 2 1 0x00800000
      
      For additional details check i.MX 8M Mini Apllication Processor
      Reference Manual, 6.1.5.4.5 Redundant boot support for
      expansion device chapter.
      
      [1] https://source.codeaurora.org/external/imx/imx-mkimage/
      
      
      [2] scripts/gen_sit.sh
      Change-Id: I0a5cea7295a4197f6c89183d74b4011cada52d4c
      Signed-off-by: default avatarIgor Opaniuk <igor.opaniuk@foundries.io>
      9ce232fe
  2. 23 Mar, 2021 2 commits
  3. 19 Aug, 2020 1 commit
  4. 06 Aug, 2020 1 commit
  5. 10 Jul, 2020 1 commit
    • Jacky Bai's avatar
      plat: imx8m: Move the gpc hw reg to a separate header file · 9e5c3e92
      Jacky Bai authored
      
      
      Although the GPC provides the similar functions for all the
      i.MX8M SoC family, the HW register offset and bit defines
      still have some slight difference, so move the hw reg
      offset & most of the bitfield defines in 'gpc_reg.h' that
      is specific to each SoC.
      Signed-off-by: default avatarJacky Bai <ping.bai@nxp.com>
      Change-Id: I291c435fe98c2f6e6ff8fe0c715ff3a83daa6a0f
      9e5c3e92
  6. 05 Mar, 2020 1 commit
  7. 24 Jan, 2020 1 commit
  8. 05 Nov, 2019 1 commit
  9. 04 Jul, 2019 1 commit
  10. 13 Mar, 2019 1 commit
    • Jacky Bai's avatar
      plat: imx8m: Add the basic support for imx8mm · 179f82a2
      Jacky Bai authored
      
      
      The i.MX8M Mini is new SOC of the i.MX8M family. it is
      focused on delivering the latest and greatest video and
      audio experience combining state-of-the-art media-specific
      features with high-performance processing while optimized
      for lowest power consumption. The i.MX 8M Mini Media Applications
      Processor is  14nm FinFET product of the growing i.MX8M family
      targeting the consumer & industrial market. It is built in 14LPP
      to achieve both high performance and low power consumption
      and relies on a powerful fully coherent core complex based on
      a quad Cortex-A53 cluster with video and graphics accelerators
      
      this patch add the basic support for i.MX8MM.
      Signed-off-by: default avatarJacky Bai <ping.bai@nxp.com>
      179f82a2