- 10 Jun, 2014 1 commit
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Andrew Thoelke authored
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- 03 Jun, 2014 9 commits
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Dan Handley authored
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Dan Handley authored
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Achin Gupta authored
This patch adds documentation that describes the design of the Interrupt management framework in the ARM Trusted Firmware. The porting-guide.md has also been updated to describe the interface that should be implemented by each platform to support this framework. Change-Id: I3eda48e5c9456e6a9516956bee16a29e366633b7 Co-Authored-By: Soby Mathew <soby.mathew@arm.com>
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Dan Handley authored
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Dan Handley authored
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Dan Handley authored
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Vikram Kanigiri authored
Update documentation with BL3-1 hardening interface changes and for using BL3-1 as a reset vector feature Change-Id: Iafdd05e7a8e66503409f2acc934372efef5bc51b
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Dan Handley authored
Updates to readme.md and change-log.md to describe the features and changes in the v0.4 release. Change-Id: Ice0a7cf7abae349f552e662eac638a46acc5db3f
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Dan Handley authored
Update the Linux kernel, Linaro file system, FVP and DS-5 versions used for the v0.4 release in user-guide.md. Change-Id: I2265fc17c229d4b8cc52165d6583a4a579cdcee3
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- 02 Jun, 2014 2 commits
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Lin Ma authored
Current ATF uses a direct physical-to-virtual mapping, that is, a physical address is mapped to the same address in the virtual space. For example, physical address 0x8000_0000 is mapped to 0x8000_0000 virtual. This approach works fine for FVP as all its physical addresses fall into 0 to 4GB range. But for other platform where all I/O addresses are 48-bit long, If we follow the same direct mapping, we would need virtual address range from 0 to 0x8fff_ffff_ffff, which is about 144TB. This requires a significant amount of memory for MMU tables and it is not necessary to use that much virtual space in ATF. The patch is to enable mapping a physical address range to an arbitrary virtual address range (instead of flat mapping) Changed "base" to "base_va" and added "base_pa" in mmap_region_t and modified functions such as mmap_add_region and init_xlation_table etc. Fixes ARM-software/tf-issues#158
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Soby Mathew authored
This patch modifies and adds to the existing documentation for the crash reporting implementation in BL3-1. Change-Id: I2cfbfeeeb64996ec7d19a9ddf95295482899b4bd
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- 30 May, 2014 2 commits
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Dan Handley authored
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Dan Handley authored
Following recent refactoring changes to platform.h, this commit updates porting-guide.md to correctly refer to platform.h and platform_def.h where appropriate. Change-Id: Idf1e77503c24358696f8f3c14caa0cc1d579deb4
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- 29 May, 2014 6 commits
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Dan Handley authored
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Dan Handley authored
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Dan Handley authored
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Soby Mathew authored
This patch fixes the compilation issue for trusted firmware when the IMF_READ_INTERRUPT_ID is enabled. Change-Id: I94ab613b9bc96a7c1935796c674dc42246aaafee
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Soby Mathew authored
The interrupt handling routine in BL3-1 expects a cookie as its last parameter which was not being passed when invoking the interrupt handler in BL3-1. This patch fixes that by passing a dummy cookie parameter in the x3 register. Fixes ARM-software/tf-issues#171 Change-Id: Ic98abbbd9f849e6f1c55343e865b5e0a4904a1c5
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Andrew Thoelke authored
bl2_main() was overwriting any platform set X1 parameter for BL3-1 with the value zero. This patch ensure that any platform set value is correctly passed to BL3-1. The FVP port adds a check to verify this parameter is being passed correctly. Fixes ARM-software/tf-issues#173 Change-Id: Ifbcda73d3d41d2b04a4baf5614e9d2d21f1717c8
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- 28 May, 2014 1 commit
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Vikram Kanigiri authored
At present the arguments for BL3-3 in the entry_point_info structure are not being transferred to X0-X7 before starting execution of this image This patch saves the args for BL3-3 into cpu context used for its entry Fixes ARM-software/tf-issues#172 Change-Id: I001b4b9bff6a264336f0d01d377619ae719f928b
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- 27 May, 2014 5 commits
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Dan Handley authored
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Dan Handley authored
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Dan Handley authored
Rename the ic_* platform porting functions to plat_ic_* to be consistent with the other functions in platform.h. Also rename bl31_get_next_image_info() to bl31_plat_get_next_image_ep_info() and remove the duplicate declaration in bl31.h. Change-Id: I4851842069d3cff14c0a468daacc0a891a7ede84
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Dan Handley authored
Remove the FVP specific comments in platform.h since this file is re-usable across all platforms. Change-Id: Ifd4a4f72562adb3ecf8b9078b0150f170ef22dba
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Soby Mathew authored
This patch fixes a missed return and code alignment issues in TSP_FID_RESUME handling. Change-Id: Icf8aeb76dfd6898745653ce039e3bac45e0a9b3a
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- 23 May, 2014 14 commits
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Dan Handley authored
Previously, the enable_mmu_elX() functions were implicitly part of the platform porting layer since they were included by generic code. These functions have been placed behind 2 new platform functions, bl31_plat_enable_mmu() and bl32_plat_enable_mmu(). These are weakly defined so that they can be optionally overridden by platform ports. Also, the enable_mmu_elX() functions have been moved to lib/aarch64/xlat_tables.c for optional re-use by platform ports. These functions are tightly coupled with the translation table initialization code. Fixes ARM-software/tf-issues#152 Change-Id: I0a2251ce76acfa3c27541f832a9efaa49135cc1c
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Dan Handley authored
FVP specific files and functions containing the word "plat" have been renamed to use the word "fvp" to distinguish them from the common platform functionality and porting functions. Change-Id: I39f9673dab3ee9c74bd18b3e62b7c21027232f7d
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Dan Handley authored
Some platform porting functions were in BL specific header files. These have been moved to platform.h so that all porting functions are in the same place. The functions are now grouped by BL. Obsolete BL headers files have been removed. Also, the weak declaration of the init_bl2_mem_layout() function has been moved out the header file and into the source file (bl_common.c) using the more succinct #pragma syntax. This mitigates the risk of 2 weak definitions being created and the wrong one being picked up by the compiler. Change-Id: Ib19934939fd755f3e5a5a5bceec88da684308a83
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Dan Handley authored
Previously, platform.h contained many declarations and definitions used for different purposes. This file has been split so that: * Platform definitions used by common code that must be defined by the platform are now in platform_def.h. The exact include path is exported through $PLAT_INCLUDES in the platform makefile. * Platform definitions specific to the FVP platform are now in /plat/fvp/fvp_def.h. * Platform API declarations specific to the FVP platform are now in /plat/fvp/fvp_private.h. * The remaining platform API declarations that must be ported by each platform are still in platform.h but this file has been moved to /include/plat/common since this can be shared by all platforms. Change-Id: Ieb3bb22fbab3ee8027413c6b39a783534aee474a
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Dan Handley authored
Some data variables were declared but not used. These have been removed. Change-Id: I038632af3c32d88984cd25b886c43ff763269bf9
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Dan Handley authored
Function declarations implicitly have external linkage so do not need the extern keyword. Change-Id: Ia0549786796d8bf5956487e8996450a0b3d79f32
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Andrew Thoelke authored
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Sandrine Bailleux authored
Rework the "Memory layout on FVP platforms" section in the Firmware Design document. Add information about where the TSP image fits in the memory layout when present. Add documentation for the base addresses of each bootloader image in the porting guide. Change-Id: I4afb2605e008a1cb28c44a697804f2cb6bb4c9aa
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Sandrine Bailleux authored
Currently the platform code gets to define the base address of each boot loader image. However, the linker scripts couteract this flexibility by enforcing a fixed overall layout of the different images. For example, they require that the BL3-1 image sits below the BL2 image. Choosing BL3-1 and BL2 base addresses in such a way that it violates this constraint makes the build fail at link-time. This patch requires the platform code to now define a limit address for each image. The linker scripts check that the image fits within these bounds so they don't rely anymore on the position of a given image in regard to the others. Fixes ARM-software/tf-issues#163 Change-Id: I8c108646825da19a6a8dfb091b613e1dd4ae133c
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Sandrine Bailleux authored
BL1 RO and RW base address used to be fixed, respectively to the first address of the Trusted ROM and the first address of the Trusted RAM. Introduce new platform defines to configure the BL1 RO and RW base addresses. Change-Id: If26616513a47798593a4bb845a4b0fb37c867cd6
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Andrew Thoelke authored
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Andrew Thoelke authored
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Andrew Thoelke authored
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Andrew Thoelke authored
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