- 02 May, 2019 1 commit
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Christoph Müllner authored
All supported Rockchip SoCs (RK3288, RK3328, RK3368 and RK3399) have non-continuous memory areas in the linker script with a huge gap between them. This results in extremely padded binary images with a size of about 4 GiB. E.g. on the RK3399 we have the following memory areas (and base addresses): RAM (0x1000), SRAM (0xFF8C0000), and PMUSRAM (0xFF3B0000). Consumers of the TF-A project (e.g. coreboot or U-Boot) therefore use the ELF image instead, which has a size of a few hundred kBs. In order to prevent the generation of a huge and useless file, this patch disables the binary generation for all affected Rockchip SoCs. Signed-off-by: Christoph Müllner <christophm30@gmail.com> Change-Id: I4ac65bdf1e598c3e1a59507897d183aee9a36916
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- 01 May, 2019 1 commit
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Christoph Müllner authored
In order to set the UART base during bootup in common code of plat/rockchip, we need to streamline the way the UART base addresses are defined and add the missing definitions and mappings. This patch does so by following the pattern UARTn_BASE, which is already in use on RK3399 and RK3328. The numbering itself is derived from the upstream Linux DTS files of the individual SoCs. Signed-off-by: Christoph Müllner <christophm30@gmail.com> Change-Id: I341a1996f4ceed5f82a2f6687d4dead9d7cc5c1f
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- 26 Apr, 2019 1 commit
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Heiko Stuebner authored
While mainline u-boot always expects to submit the devicetree as platform param, coreboot always uses the existing parameter structure. As libfdt is somewhat big, it makes sense to limit its inclusion to where necessary and thus only to non-coreboot builds. libfdt itself will get build in all cases, but only the non- coreboot build will actually reference and thus include it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: I4c5bc28405a14e6070917e48a526bfe77bab2fb7
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- 25 Apr, 2019 1 commit
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Heiko Stuebner authored
The rk3288 is a 4-core Cortex-A12 SoC and shares a lot of features with later SoCs. Working features are general non-secure mode (the gic needs special love for that), psci-based smp bringing cpu cores online and also taking them offline again, psci-based suspend (the simpler variant also included in the linux kernel, deeper suspend following later) and I was also already able to test HYP-mode and was able to boot a virtual kernel using kvm. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: Ibaaa583b2e78197591a91d254339706fe732476a
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