- 13 May, 2020 1 commit
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Sandrine Bailleux authored
Most of the changes consist in using the new code owners terminology (from [1]). [1] https://developer.trustedfirmware.org/w/collaboration/project-maintenance-process/ Change-Id: Icead20e9335af12aa47d3f1ac5d04ca157b20c82 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 15 Apr, 2020 1 commit
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laurenw-arm authored
A small set of misc changes to ensure correctness before the v2.3 release. Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I5b4e35b3b46616df0453cecff61f5a414951cd62
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- 17 Mar, 2020 1 commit
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Andre Przywara authored
With the addition of the Raspberry Pi 4 port the directory structure changed a bit, also the new port didn't have a separate entry. Add a new entry for the RPi4 port and adjust the path names. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: I04b60e729a19bb0cc3dd6ce6899ec6480356b1f1
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- 26 Feb, 2020 1 commit
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Sandrine Bailleux authored
The maintainers.rst file lists files and directories that each contributor looks after in the TF-A source tree. As files and directories move around over time, some pathnames had become invalid. Fix them, either by updating the path if it has just moved, or deleting it altogether if it doesn't seem to exist anymore. Change-Id: Idb6ff4d8d0b593138d4f555ec206abcf68b0064f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 06 Feb, 2020 1 commit
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Carlo Caione authored
Introduce the preliminary support for the Amlogic A113D (AXG) SoC. This port is a minimal implementation of BL31 capable of booting mainline U-Boot, Linux and chainloading BL32 (ATOS). Tested on a A113D board. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ic4548fa2f7c48d61b485b2a6517ec36c53c20809
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- 16 Dec, 2019 1 commit
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Sandrine Bailleux authored
Change-Id: Ia4faf873f8946992737f76870ac92bc5cb3f4020 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 22 Oct, 2019 1 commit
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Paul Beesley authored
A small set of misc changes to ensure correctness before the v2.2 release tagging. Change-Id: I888840b9483ea1a1633d204fbbc0f9594072101e Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 21 Oct, 2019 1 commit
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Paul Beesley authored
The index.rst page is now the primary landing page for the TF-A documentation. It contains quite a lot of content these days, including: - The project purpose and general intro - A list of functionality - A list of planned functionality - A list of supported platforms - "Getting started" links to other documents - Contact information for raising issues This patch creates an "About" chapter in the table of contents and moves some content there. In order, the above listed content: - Stayed where it is. This is the right place for it. - Moved to About->Features - Moved to About->Features (in subsection) - Stayed where it is. Moved in a later patch. - Was expanded in-place - Moved to About->Contact Change-Id: I254bb87560fd09140b9e485cf15246892aa45943 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 11 Oct, 2019 1 commit
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Paul Beesley authored
Tidying up a few Sphinx warnings that had built-up over time. None of these are critical but it cleans up the Sphinx output. At the same time, fixing some spelling errors that were detected. Change-Id: I38209e235481eed287f8008c6de9dedd6b12ab2e Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 26 Sep, 2019 1 commit
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Carlo Caione authored
Introduce the preliminary support for the Amlogic S905X2 (G12A) SoC. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux. Tested on a SEI510 board. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ife958f10e815a4530292c45446adb71239f3367f
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- 05 Sep, 2019 1 commit
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Carlo Caione authored
Meson is the internal code name for the SoC family. The correct name for the platform should be Amlogic. Change the name of the platform directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Icc140e1ea137f12117acbf64c7dcb1a8b66b345d
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- 17 Jul, 2019 1 commit
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Hadi Asyrafi authored
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Ib2ad2068abdf0b204c5cb021ea919581adaca4ef
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- 10 Jun, 2019 1 commit
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John Tsichritzis authored
Also sort alphabetically the links at the bottom, a couple of them were not sorted. Change-Id: I49a1dbe9e56a36c5fdbace8e4c8b9a5270bc2984 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 22 May, 2019 1 commit
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Paul Beesley authored
This patch attempts to standardise the document titles as well as adding titles to documents that were missing one. The aim is to remove needless references to "TF-A" or "Trusted Firmware" in the title of every document and to make sure that the title matches with the document content. Change-Id: I9b93ccf43b5d57e8dc793a5311b8ed7c4dd245cc Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 21 May, 2019 1 commit
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Paul Beesley authored
This change creates the following directories under docs/ in order to provide a grouping for the content: - components - design - getting_started - perf - process In each of these directories an index.rst file is created and this serves as an index / landing page for each of the groups when the pages are compiled. Proper layout of the top-level table of contents relies on this directory/index structure. Without this patch it is possible to build the documents correctly with Sphinx but the output looks messy because there is no overall hierarchy. Change-Id: I3c9f4443ec98571a56a6edf775f2c8d74d7f429f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 09 May, 2019 1 commit
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Antonio Nino Diaz authored
I'm giving full maintainership of the Raspberry Pi 3 platform port to Paul. I'm also leaving the GXBB maintainership to Andre, who is also happy to pass it on to someone else who is more interested in it. Change-Id: Ieb2212f5fc11ebde9fc0c857e9e305d691d4ee3f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 25 Apr, 2019 1 commit
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Heiko Stuebner authored
This adds a rockchip.rst to docs/plat documenting the general approach to using the Rockchip ATF platforms together with the supported bootloaders and also adds myself as maintainer after making sure Tony Xie is ok with that. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: Idce53d15eff4ac6de05bbb35d86e57ed50d0cbb9
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- 02 Apr, 2019 1 commit
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Remi Pommarel authored
Also adds a maintainer for GXL. Signed-off-by: Remi Pommarel <repk@triplefau.lt>
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- 04 Mar, 2019 1 commit
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Marek Vasut authored
Add myself into the maintainers file to make Jorge's life easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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- 07 Feb, 2019 1 commit
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Sandrine Bailleux authored
Change-Id: I89a451fa22d517f9c59dfa0a74f28deb6d750b8f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 05 Feb, 2019 1 commit
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Thomas Abraham authored
Add a second maintainer for Arm's SGI and SGM platform support in trusted firmware to handle the review and maintenance of existing and upcoming platforms. Change-Id: Ie7fa8da280d9351f7543122fb261d6ac6c7e15ad Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
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- 04 Feb, 2019 1 commit
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Loh Tien Hock authored
This adds BL2 support for Intel Stratix 10 SoC FPGA. Functionality includes: - Release and setup peripherals from reset - Calibrate DDR - ECC DDR Scrubbing - Load FIP (bl31 and bl33) Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
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- 31 Jan, 2019 1 commit
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Ying-Chun Liu (PaulLiu) authored
This patch adds myself to co-maintainer list of Raspberry Pi 3 platform. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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- 14 Jan, 2019 1 commit
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Jacky Bai authored
This patch adds me to various maintainer activities in the ATF tree associated with the NXP i.MX8M platform. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Change-Id: Idd5a2b700b936b22e94194dfadee68b968d03380 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 07 Dec, 2018 1 commit
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Julius Werner authored
I wrote most of this code and have a vested interest in keeping it healthy, so adding myself as a maintainer. Change-Id: I0edeebbc8336b6976dfaf393b3cfc7bc94089ac6 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 26 Oct, 2018 1 commit
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Antonio Nino Diaz authored
Change-Id: Ie2465c1ccc482bd8eb5e5a71c580543095e4ba94 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 22 Oct, 2018 1 commit
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Konstantin Porotchkin authored
Move doimage utility from toos/doimage to tools/marvell/doimage. This is done for supporting mode Marvell tools in the future. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 17 Oct, 2018 1 commit
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Jorge Ramirez-Ortiz authored
Reference code: ============== rar_gen3: IPL and Secure Monitor Rev1.0.22 https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3] Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com> Date: Thu Aug 30 21:26:41 2018 +0900 Update IPL and Secure Monitor Rev1.0.22 General Information: =================== This port has been tested on the Salvator-X Soc_id r8a7795 revision ES1.1 (uses an SPD). Build Tested: ------------- ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1" MBEDTLS_DIR=$mbedtls $ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed Other dependencies: ------------------ * mbed_tls: git@github.com:ARMmbed/mbedtls.git [devel] Merge: 68dbc94 f34a4c1 Author: Simon Butcher <simon.butcher@arm.com> Date: Thu Aug 30 00:57:28 2018 +0100 * optee_os: https://github.com/BayLibre/optee_os Until it gets merged into OP-TEE, the port requires Renesas' Trusted Environment with a modification to support power management. Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com> Date: Thu Aug 30 16:49:49 2018 +0200 plat-rcar: cpu-suspend: handle the power level Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com> * u-boot: The port has beent tested using mainline uboot. Author: Fabio Estevam <festevam@gmail.com> Date: Tue Sep 4 10:23:12 2018 -0300 *linux: The port has beent tested using mainline kernel. Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Sep 16 11:52:37 2018 -0700 Linux 4.19-rc4 Overview --------- BOOTROM starts the cpu at EL3; In this port BL2 will therefore be entered at this exception level (the Renesas' ATF reference tree [1] resets into EL1 before entering BL2 - see its bl2.ld.S) BL2 initializes DDR (and i2c to talk to the PMIC on some platforms) before determining the boot reason (cold or warm). During suspend all CPUs are switched off and the DDR is put in backup mode (some kind of self-refresh mode). This means that BL2 is always entered in a cold boot scenario. Once BL2 boots, it determines the boot reason, writes it to shared memory (BOOT_KIND_BASE) together with the BL31 parameters (PARAMS_BASE) and jumps to BL31. To all effects, BL31 is as if it is being entered in reset mode since it still needs to initialize the rest of the cores; this is the reason behind using direct shared memory access to BOOT_KIND_BASE and PARAMS_BASE instead of using registers to get to those locations (see el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use case). Depending on the boot reason BL31 initializes the rest of the cores: in case of suspend, it uses a MBOX memory region to recover the program counters. [1] https://github.com/renesas-rcar/arm-trusted-firmware Tests ----- * cpuidle ------- enable kernel's cpuidle arm_idle driver and boot * system suspend -------------- $ cat suspend.sh #!/bin/bash i2cset -f -y 7 0x30 0x20 0x0F read -p "Switch off SW23 and press return " foo echo mem > /sys/power/state * cpu hotplug: ------------ $ cat offline.sh #!/bin/bash nbr=$1 echo 0 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline $ cat online.sh #!/bin/bash nbr=$1 echo 1 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline Signed-off-by: ldts <jramirez@baylibre.com>
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- 07 Oct, 2018 1 commit
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Konstantin Porotchkin authored
Declate Marvell's ownership on tools/doimage Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 03 Oct, 2018 1 commit
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Nariman Poushin authored
Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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- 07 Sep, 2018 1 commit
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Icenowy Zheng authored
Allwinner 64-bit SoCs all use the Mentor Graphics MI2CV I2C controller core, with inverted clear quirk. Add a glue driver for this. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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- 04 Sep, 2018 1 commit
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Bryan O'Donoghue authored
This patch adds me to various maintainer activities in the ATF tree associated with the NXP i.MX7 generally and WaARP7 in particular. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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- 29 Aug, 2018 1 commit
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Nariman Poushin authored
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- 28 Aug, 2018 1 commit
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Yann Gautier authored
Folders drivers/st/ and include/drivers/st/ are added in maintainers.rst, under STM32MP1 platform port. This will allow notifications for the files modified there. Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 10 Aug, 2018 1 commit
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Haojian Zhuang authored
Remove emmc framework from maintain list. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 24 Jul, 2018 1 commit
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Yann Gautier authored
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 18 Jul, 2018 1 commit
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Konstantin Porotchkin authored
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 04 Jul, 2018 1 commit
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Andre Przywara authored
A proper link to Samuel's github page was missing. Add this to make the link actually work. Change-Id: I68b116935bf045df60b2e9309b5fd58a1c694d47 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 28 Jun, 2018 1 commit
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Andre Przywara authored
As Samuel contributed most of the original code and he has an interest in that, add him as a second maintainer for the Allwinner port. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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