- 04 Jan, 2019 2 commits
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Antonio Niño Díaz authored
docs: marvell: Fix typo in file build.txt
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Antonio Niño Díaz authored
Enable DIT if supported
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- 03 Jan, 2019 1 commit
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Sathees Balya authored
This patch enables the Data Independent Timing functionality (DIT) in EL3 if supported by the platform. Change-Id: Ia527d6aa2ee88a9a9fe1c941220404b9ff5567e5 Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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- 25 Dec, 2018 1 commit
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Ding Tao authored
Replace "SECURE=0" with "MARVELL_SECURE_BOOT=0". Signed-off-by: Ding Tao <miyatsu@qq.com>
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- 19 Dec, 2018 5 commits
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Antonio Niño Díaz authored
Use SPDX identifier in checkpatch config file
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Antonio Nino Diaz authored
Change-Id: I4113604ac69ba07bd90d8268be65cae8aa43138e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Niño Díaz authored
clang: 32 bit compilation should include march32-directive
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Antonio Niño Díaz authored
gitignore: Ignore sptool and doimage binaries
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Antonio Niño Díaz authored
Tegra native gicv2
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- 18 Dec, 2018 15 commits
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Varun Wadekar authored
This patch converts Tegra platforms to support native GICv2 drivers. This involves removes Tegra's GIC driver port platforms to use interrupt_props Change-Id: I83d8a690ff276dd97928dc60824a4fd36999bb30 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch adds a macro to allow platforms to compile native GICv2 drivers along with Tegra handlers. Change-Id: I8281796c09dae5704cff2daab831395d65e261b7 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Antonio Nino Diaz authored
Change-Id: I119b85179f68148e128cc194f11d2cccb1e33d6d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Niño Díaz authored
plat: rcar: Move FDT from x3 to x1
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Antonio Niño Díaz authored
romlib: Add platform specific jump table list
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Sathees Balya authored
This patch allows platforms to define their own jump table list for library at ROM. The file has the list of functions to be used from library at ROM. It can also include other list files. Change-Id: I721c35d7dad3dcadbb3a7f3277bfd5d3e1f6e00a Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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Antonio Niño Díaz authored
Synchronize architectural headers with TF-A-Tests
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Antonio Nino Diaz authored
This is done in order to keep the files in both repositories in sync. Change-Id: Ie1a9f321cbcfe8d7d14f206883fa718872271218 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I8a0be21783a0c12325e6ab22e9e53ab5466ed9e0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Some of the affected macros can only be used from C code. In general, we use arch_helpers.h for any C helpers to access registers. For consistency, the other macros have been moved as well. Also, import some AArch32 helpers from TF-A-Tests. Change-Id: Ie8fe1ddeadba5336c12971ddc39a7883121386b1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Niño Díaz authored
build: find "armclang" string in the 'CC' variable
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Antonio Niño Díaz authored
stm32mp1: remove useless compilation flags
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Yann Gautier authored
This is done for other compilers, and without this some code does not compile, like inline assembly code. Fixes ARM-software/tf-issues#657. Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Antonio Niño Díaz authored
GIC: Remove lowest priority constants
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Antonio Niño Díaz authored
FVP: Fixes for RESET_TO_BL31
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- 17 Dec, 2018 4 commits
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Soby Mathew authored
This patch updates the user guide instructions for RESET_TO_SP_MIN and RESET_TO_BL31 cases. The load address for BL31 had to be updated because of increase in code size. Also, information about PIE support when RESET_TO_BL31=1 for FVP is added. In the case of RESET_TO_SP_MIN, the RVBAR address was wrong in the instruction. This is also corrected in the patch. Change-Id: I65fe6d28c5cf79bee0a11fbde320d49fcc1aacf5 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
When the patch SHA 931f7c61 introduced PIE support for BL31, adding the GOT section when the SEPARATE_CODE_AND_RODATA=0 to the linker script was erroneously omitted. This patch corrects the same. Also the patch reduces the alignment requirement for GOT and RELA sections from 16 bytes to 8. Comments are added explain the intent for alignment. Change-Id: I8035cbf75f346f99bd56b13f32e0b3b70dd2fe6c Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch defines BL31_BASE to 0x0 when RESET_TO_BL31=1 as the executable is built with PIE support and can be loaded anywhere in SRAM for execution. Change-Id: I4007f4626322f1200a6304c9c565987d3357986c Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Antonio Niño Díaz authored
docs: marvell: Fix typo in file build.txt
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- 14 Dec, 2018 1 commit
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Jeenu Viswambharan authored
The GIC lowest priority values for each world depends on the number of priority values implemented in hardware. These constants currently defined in gic_common.h only meant to enumerate lowest possible architectural values. Since these values are not used in generic code or upstream platforms, and that general use of these constants can be wrong, remove these. Platforms should either define and use these as appropriate, or determine correct values at run time. Change-Id: I3805cea8ceb8a592b9eff681ea1b63b7496cec5f Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 13 Dec, 2018 2 commits
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Marek Vasut authored
As suggested, pass the FDT to BL 33 via x1 instead of x3 , to be consistent with the other platforms. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Yann Gautier authored
On AARCH32, thumb is used by default, no need to redefine it. As all our binaries are compiled with thumb, interwork is not needed. The binaries compiled with or without those flags are the same, except of course for the date. Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 12 Dec, 2018 5 commits
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Varun Wadekar authored
This patch modifies the search criteria to see if we are using 'armclang' as the compiler. Switch over to using 'findstring' which enables platforms to do fancy stuff using scripts e.g. check if armclang timed out and retry compilation. Change-Id: If2162ebadb9033f6457a4e8d4243345e711defe6 Signed-off-by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Soby Mathew authored
Add possibility to add compilation warnings
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Soby Mathew authored
ccn: for RN-I, used node id instead of node postion
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Soby Mathew authored
AArch64: Use SSBS for CVE_2018_3639 mitigation
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Pankaj Gupta authored
For RN-I, node id is used instead of node postion in the bitmap to calculate the region id. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
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- 11 Dec, 2018 4 commits
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Antonio Niño Díaz authored
SPM: Initial prototype based on SPCI and SPRT
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Antonio Nino Diaz authored
Rename files prefixed by sp_ to spm_. Change-Id: Ie3016a4c4ac5987fe6fdd734c6b470c60954e23d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Also, add a disclaimer to explain that the current implementation of SPM is a prototype that is going to undergo a lot of rework. Change-Id: I303c1e61c51d9f286cc599fea565fc9ba5a996bf Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The old SMCs SP_MEMORY_ATTRIBUTES_{GET,SET}_AARCH64 have been removed in favour of SPRT_MEMORY_PERM_ATTR_{GET,SET}_AARCH64. Change-Id: Idb93cfa5461d0098df941037c5653f7c44b65227 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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