- 03 Jun, 2021 1 commit
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Jan Kiszka authored
Add basic SDEI support, implementing the software event 0 only for now. This already allows hypervisors like Jailhouse to use SDEI for internal signaling while passing the GICC through to the guest (see also IMX8). With SDEI on, we overrun the SRAM and need to stay in DRAM. So keep SDEI off by default. Co-developed-by: Angelo Ruocco <angeloruocco90@gmail.com> Signed-off-by: Angelo Ruocco <angeloruocco90@gmail.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Change-Id: Ic0d71b4ef0978c0a34393f4e3530ed1e24a39ca2
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- 21 Apr, 2021 2 commits
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Rajan Vaja authored
Counter frequency for generic timer of Arm-A53 based Application Processing Unit(APU) is not configuring in case if First Stage Boot Loader(FSBL) does not initialize counter frequency. This happens when FSBL is running from Arm-R5 based Real-time Processing Unit(RPU). Because of that generic timer driver functionality is not working. So configure counter frequency during initialization. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: Icfccd59d7d2340fba25ebfb2ef6a813af4290896
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Venkatesh Yadav Abbarapu authored
Rename the macro ZYNQMP_IPI_CRC_CHECK to IPI_CRC_CHECK and move the related defines to the common include. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I6d30b081ac607572a0b23e10ca8031bc90489e58
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- 12 Jan, 2021 1 commit
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Will Wong authored
Add ability to support PS and System reset after idling the APU, by reading the restart scope from the PMU. Signed-off-by: Will Wong <willw@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I23c01725d8ebb71ad34be02ab204411b93620702
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- 04 Jan, 2021 1 commit
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Kalyani Akula authored
This patch adds new zynqmp-pm api to provide read/write access to CSU or PMU global registers. Signed-off-by: Kalyani Akula <kalyania@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I4fd52eb732fc3e6a8bccd96cad7dc090b2161042
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- 07 Dec, 2020 1 commit
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Tejas Patel authored
For boot health status PMU Global General Storage Register 4 is used. GGS4 can be used for other purpose along with boot health status. So, change its name from PM_BOOT_HEALTH_STATUS_REG to PMU_GLOBAL_GEN_STORAGE4. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I2f5c4c6a161121e7cdb4b9f0f8711d0dad16c372
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- 30 Mar, 2020 1 commit
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Manish V Badarkhe authored
Moved SMCCC defines from plat_arm.h to new <smccc_def.h> header and include this header in all ARM platforms. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I4cbc69c7b9307461de87b7c7bf200dd9b810e485
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- 24 Jan, 2020 1 commit
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I76f5535f1cbdaf3fc1235cd824111d9afe8f7e1b
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- 23 Jan, 2020 1 commit
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Venkatesh Yadav Abbarapu authored
ATF handover can be used by Xilinx platforms, so move it to common file from platform specific files. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I5f0839351f534619de581d1953c8427a079487e0
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- 15 Jan, 2020 1 commit
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Venkatesh Yadav Abbarapu authored
This patch adds support for CRC checksum for IPI data when the macro ZYNQMP_IPI_CRC_CHECK is defined. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Ic981f162666b3c1fffeb1b9fef3ee7714ecd889d
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- 07 Jan, 2020 1 commit
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Mounika Grace Akula authored
This patch adds LPD WDT clock node to the pm_clock clocks structure list so that LPD WDT can be used from Linux. Also this patch removes the CLK_LPD_LSBUS from invalid clock list to allow the registration of this clock to CCF framework as it is the parent of LPD WDT. Signed-off-by: Mounika Grace Akula <mounika.grace.akula@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Iea065aa8150eaba4bb4b42bc6be1fd4b7fe7b403
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- 01 Jul, 2019 1 commit
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Ambroise Vincent authored
This patch addds multi console interface for ZynqMP platform Change-Id: I508a61412df2b71d04bca6a1139c8f32cbd7dccd Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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- 01 Feb, 2019 1 commit
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Sandrine Bailleux authored
PLAT_ARM_NS_IMAGE_OFFSET is in fact not an offset relative to some base address, it is an absolute address. Rename it to avoid any confusion. Change-Id: I1f7f5e8553cb267786afe7e5f3cd4d665b610d3f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 09 Jan, 2019 6 commits
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Jolly Shah authored
pm_service ipi functions can be used by other xilinx platforms. So move it to common directory. Also change node_id member type in pm_proc structure so it can be used for versal where device IDs are used instead of node IDs. To accommodate this change header files are re-organized. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Reviewed-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Jolly Shah authored
ipi_mb functions can be used for other Xilinx platform. Move it to common file from platform specific files. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Reviewed-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Jolly Shah authored
ipi_mb function uses platform specific ipi configuration table. These ipi_mb functions can be used for other Xilinx platform. So, instead of using direct data structure, initialize IPI configuration data by passing platform specific ipi table. Macros are updated accordingly for this ipi table change. This change is done so that ipi_mb functions can be moved to common file without major changes. All common functions now would be moved to common file in next patch. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Reviewed-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Jolly Shah authored
Move zynqmp_ipi.h to platform specific include directory. Rename it to plat_ipi.h instead of platform name. So, it can be used to common source files which needs platform specific data. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Reviewed-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Jolly Shah authored
Move zynqmp_def.h to platform specific include directory. Also, update source file to include header file from updated path of zynqmp_def.h Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Reviewed-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Jolly Shah authored
Move zynqmp_private.h to platform specific include directory. Also, rename it to plat_private.h instead of having platform name. So, it can be used to common source files which needs platform specific data. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Reviewed-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 20 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 21 Jun, 2018 1 commit
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Siva Durga Prasad Paladugu authored
This patch builds ATF to DDR if SPD is enabled as it cant fit in On chip memory(OCM) with SPD enabled. This solves the issue of build failure with SPD enabled for ZynqMP platform. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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- 17 May, 2018 1 commit
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Siva Durga Prasad Paladugu authored
This patch adds support to restart system incase of wdt timeout. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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- 15 Mar, 2018 1 commit
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Jolly Shah authored
Define default DDR location to which ATF has to compiled if DEBUG option is enabled. This is required now, as the ATF cant fit in OCM with DEBUG option enabled. The default value is 0x1000 and can be used till 0x7ffff. User can still override as per wish/requirement using current commandline options. Signed-off-by: Jolly Shah <jollys@xilinx.com>
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- 27 Feb, 2018 1 commit
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David Cunado authored
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes. This patch resolves this for the ULL() macro by using ULL suffix instead of the ull suffix. Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 17 Oct, 2017 1 commit
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Jeenu Viswambharan authored
Change-Id: Ia8503d446cc8b4246013046f6294fea364c9c882 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 06 Jan, 2017 1 commit
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Soren Brinkmann authored
Commit 0029624f ("Add PLAT_xxx_ADDR_SPACE_SIZE definition") deprecates 'ADDR_SPACE_SIZE' in favor of PLAT_(PHY|VIRT)_ADDRESS_SPACE_SIZE. Migrate the zynqmp platform to use the new interface. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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- 16 Nov, 2016 1 commit
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Soren Brinkmann authored
Remove dead code pieces and stale comments. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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- 13 Sep, 2016 2 commits
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Soren Brinkmann authored
When moving the ATF into the DRAM address space an additional translation table is required. Reported-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Soren Brinkmann authored
The OCM space was reorganized to use the space more efficiently. Adjust the default ATF location to be aligned with other ZynqMP software components. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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- 11 Jul, 2016 1 commit
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Soren Brinkmann authored
Set the SEPARATE_CODE_AND_RODATA build flag to map read-only data as execute never. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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- 24 May, 2016 1 commit
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Soren Brinkmann authored
The GIC area is specified larger than it needs to be and can be reduced. Which allows reducing the structures required for the translation tables as well. This results in a reduction of memory footprint of ca. 4k. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
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- 25 Apr, 2016 1 commit
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Soren Brinkmann authored
Drop the current configuration options for selecting the location of the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION). The new configuration provides one default setup (ATF in OCM, BL32 in DRAM). Additionally, the new configuration options - ZYNQMP_ATF_MEM_BASE - ZYNQMP_ATF_MEM_SIZE - ZYNQMP_BL32_MEM_BASE - ZYNQMP_BL32_MEM_SIZE can be used to freely configure the memory locations used for ATF and secure payload. Also, allow setting the BL33 entry point via PRELOADED_BL33_BASE. Cc: petalinux-dev@xilinx.com Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Alistair Francis <alistair.francis@xilinx.com>
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- 14 Apr, 2016 1 commit
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Gerald Lejeune authored
It is up to the platform to implement the new plat_crash_print_regs macro to report all relevant platform registers helpful for troubleshooting. plat_crash_print_regs merges or calls previously defined plat_print_gic_regs and plat_print_interconnect_regs macros for each existing platforms. NOTE: THIS COMMIT REQUIRES ALL PLATFORMS THAT ENABLE THE `CRASH_REPORTING` BUILD FLAG TO MIGRATE TO USE THE NEW `plat_crash_print_regs()` MACRO. BY DEFAULT, `CRASH_REPORTING` IS ENABLED IN DEBUG BUILDS FOR ALL PLATFORMS. Fixes: arm-software/tf-issues#373 Signed-off-by: Gerald Lejeune <gerald.lejeune@st.com>
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- 06 Apr, 2016 1 commit
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Soren Brinkmann authored
The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This patch adds the platform port for that SoC. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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