- 14 Feb, 2019 6 commits
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Yann Gautier authored
Create a new file stm32mp_clkfunc.c to put functions that could be common between several platforms. Change-Id: Ica915c796b162b2345056b33328acc05035a242c Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Regulator configuration at boot takes more information from DT. I2C configuration from DT is done in I2C driver. I2C driver manages more transfer modes. The min voltage of buck1 should also be increased to 1.2V, else the platform does not boot. Heavily modifies stm32_i2c.c since many functions move inside the source file to remove redundant declarations. Change-Id: I0bee5d776cf3ff15e687427cd6abc06ab237d025 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
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Yann Gautier authored
timeout_init_us(some_timeout_us); returns a reference to detect timeout for the provided microsecond delay value from current time. timeout_elapsed(reference) return true/false whether the reference timeout is elapsed. This change is inspired by the OP-TEE OS timeout resources [1]. [1] https://github.com/OP-TEE/optee_os/blob/3.4.0/core/arch/arm/include/kernel/delay.h#L45 Change-Id: Id81ff48aa49693f555dc621064878417101d5587 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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Yann Gautier authored
Include all RCC, clocks and reset headers from stm32mp1_def.h which if exported to the firmware through platform_def.h. The same dependency removal is done in common code as well. Some useless includes are also removed in stm32_sdmmc2 driver. Change-Id: I731ea5775c3fdb7f7b0c388b93923ed5e84b8d3f Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions that can be used in drivers shared by different platforms. Change-Id: I2295c44f5b1edac7e80a93c0e8dfd671b36e88e7 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Yann Gautier authored
Some parts of code could be shared with platform derivatives, or new platforms. A new folder plat/st/common is created to put common parts. stm32mp_common.h is a common API aggregate. Remove some casts where applicable. Fix some types where applicable. Remove also some platform includes that are already in stm32mp1_def.h. Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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- 13 Feb, 2019 1 commit
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Loh Tien Hock authored
A DDR calibration value is missing write mask, causing ECC DDR calibration to fail. This patch addresses the issue. ECC should also be scrubbed before MMU initializes, thus the scrubbing is moved to ddr intialization phase. Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
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- 12 Feb, 2019 1 commit
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Ying-Chun Liu (PaulLiu) authored
This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board. We also rename the functions in imx_uart driver to more specific one. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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- 11 Feb, 2019 7 commits
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Andrew F. Davis authored
ATF should be the only host needing to control a processor that it has started. ATF will need this control to stop the core later. Do not relinquish control of a core after starting the core. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Now that we have non-blocking TI-SCI functions we can initiate the shutdown sequence from the PSCI handler without needing the ti_sci_proc_shutdown helper function, which is removed. This gives us the greater control and flexibility that will be needed when cluster power down sequences are added. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Most TI-SCI functions request an ACK and wait until it is received. For some power sequence tasks we cannot wait but instead queue messages asynchronously. Three messages have been identified that will need to be used in this way. Add non-waiting versions of these functions. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Currently almost all TI-SCI messages request and check for an ACK from the system firmware. Move this into a common place to remove the same from each function. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
When a device is requested with TI-SCI its control can be made exclusive to the requesting host. This was currently the default but is not what is needed most of the time. Add _exclusive versions of the request functions and remove the exclusive flag from the default version. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
The raw get and set state functions for both devices and clocks are only meant for use internal to the TI-SCI driver, the same functionality is available from the other API that call into these. Remove them from the external interface and make them static scope to the driver. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Ryan Grachek authored
There exists a third DMA controller on the hi3660 SoC called the IOMCU DMAC. This controller is used by peripherals like SPI2 and UART3. Initialize channels 4-7 as non-secure, while 0-3 remain reserved and secure. Signed-off-by: Ryan Grachek <ryan@edited.us>
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- 07 Feb, 2019 6 commits
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Varun Wadekar authored
This patch introduces explicit linker variables to mark the start and end of the per-cpu bakery lock section to help bakery_lock_normal.c calculate the size of the section. This patch removes the previously used '__PERCPU_BAKERY_LOCK_SIZE__' linker variable to make the code uniform across GNU linker and ARM linker. Change-Id: Ie0c51702cbc0fe8a2076005344a1fcebb48e7cca Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch includes bl_common.h from plat_trampoline.S to link with the __BL31_END__ symbol. Change-Id: Ie66c5009018472607db668583c9a0b3553f0ae73 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch modfies the 'tegra_soc_pwr_domain_power_down_wfi' handler to use BL31_BASE variable, provided by bl_common.h Change-Id: I9747228d0193c1ae6999284458b9f866955a61a2 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch removes the unused functions that are marked as .global in code but not defined anywhere in the code. Change-Id: Ia5057a77c0b0b4a61043eab868734cd3437304cc Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch stops including common_def.h from platform_def.h to fix a circular depoendency between them. This means platform_def.h now has to define the linker macros: * PLATFORM_LINKER_FORMAT * PLATFORM_LINKER_ARCH Change-Id: Icd540b1bd32fb37e0e455e9146c8b7f4b314e012 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Kalyani Chidambaram authored
The scatterfile to support armlink, does not seem to support shift operator. To handle this define CACHE_WRITEBACK_GRANULE with the direct value. Change-Id: I19afc7cb9c55a08cb0703f284d91018d3214353f Signed-off-by: Kalyani Chidambaram <kalyanic@nvidia.com>
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- 05 Feb, 2019 6 commits
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Varun Wadekar authored
This patch removes this macro and its usage as it is used only within the Tegra186 files and all derived platforms keep the macro enabled. Change-Id: Ib831b3c002ba4dedc3d5fafbb7d321daa28fa9ea Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch dynamically maps the first page of trusty's code memory, before accessing it to find out if we are running a 32-bit or 64-bit image. On Tegra platforms, this means we have to increase the mappings to accomodate the new memmap entry. Change-Id: If370d1e6cfcccd69b260134c1b462d8d17bee03d Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch initilises the per-CPU GIC bits during cold boot and secondary CPU power up. Commit 80c50eea accidentally left out this part. Change-Id: I73ce59dbc83580a84b827cab89fe7e1f65f9f130 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch udpates the SPE console driver to prepend '\r' to '\n'. This fixes the alignment of prints seen by the host machines on their UART ports. Tested by collecting the logs from host PC using Cutecom Reported by: Mustafa Bilgen <mbilgen@nvidia.com> Change-Id: I6e0b412bd71ff5eb889582071df8c157da5175ed Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Vignesh Radhakrishnan authored
As per ARM ARM D1.17.2, any physical IRQ interrupt received by the PE will be treated as a wake-up event, if SCR_EL3.IRQ is set to '1', irrespective of the value of the PSTATE.I bit value. This patch programs the SCR_EL3.IRQ bit before entering CPU standby state, to allow an IRQ to wake the PE. On waking up, the previous SCR_EL3 value is restored. Change-Id: Ie81cf3a7668f5ac35f4bf2ecc461b91b9b60650c Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
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Anthony Zhou authored
This patch redefines the variable LIBC_SRCS for Tegra platforms, to remove unused libc files from the list. This patch is a building block to eventually use other libc implementations in the future. Change-Id: Iccde5a75f5e2d6f4e2dbc6274beb423b80e846fd Signed-off-by: Anthony Zhou <anzhou@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 04 Feb, 2019 1 commit
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Loh Tien Hock authored
This adds BL2 support for Intel Stratix 10 SoC FPGA. Functionality includes: - Release and setup peripherals from reset - Calibrate DDR - ECC DDR Scrubbing - Load FIP (bl31 and bl33) Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
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- 01 Feb, 2019 4 commits
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Antonio Nino Diaz authored
Also, update platform_def.h guidelines about includes in the porting guide. Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Many parts of the code were duplicating symbols that are defined in include/common/bl_common.h. It is better to only use the definitions in this header. As all the symbols refer to virtual addresses, they have to be uintptr_t, not unsigned long. This has also been fixed in bl_common.h. Change-Id: I204081af78326ced03fb05f69846f229d324c711 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Sandrine Bailleux authored
The BL33 image must not go past the end of DRAM. Change-Id: I56668ab760d82332d69a8904d125d9a055aa91d5 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
PLAT_ARM_NS_IMAGE_OFFSET is in fact not an offset relative to some base address, it is an absolute address. Rename it to avoid any confusion. Change-Id: I1f7f5e8553cb267786afe7e5f3cd4d665b610d3f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 31 Jan, 2019 8 commits
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Ying-Chun Liu (PaulLiu) authored
This patch inits SDHost in BL2 earlysetup. BL2 can start operating mmc commands to read/write MMC raw blocks. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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Varun Wadekar authored
Platforms that do not support bpmp firmware, do not need access to the PMC block from outside of the CPU complex. The agents running on the CPU can always access the PMC through the EL3 exception space. This patch restricts non-secure world access to the PMC block on such platforms. Change-Id: I2c4318dc07ddf6407c1700595e0f4aac377ba258 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Krishna Reddy authored
As per the latest recommendations from the hardware team, write access needs to be disabled for APE, BPMP, NvDec and SCE clients. This patch disables stream id register writes for these MC clients to implement those recommendations. Change-Id: I8887c0f2cc5bc3fc5bba42074810ba5c1d3f121f Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
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Varun Wadekar authored
This patch updates the state machine to "not present" if the bpmp firmware is not found in the system during boot. The suspend handler also checks now if the interface exists, before updating the internal state machine. Reported by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com> Change-Id: If8fd7f8e412bb603944555c24826855226e7f48c Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch toggles the ring oscillator state across cluster idle as DFLL loses its state. We dont want garbage values being written to the pmic when we enter cluster idle state, so enable "open loop" when we enter CC6 and restore the state to "closed loop" on exit. Change-Id: I56f4649f57bcc651d6c415a6dcdc978e9444c97b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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kalyani chidambaram authored
This patch clears the PMC's DPD registers on resuming from System Suspend, for all Tegra210 platforms that support the sc7entry-fw. Change-Id: I7881ef0a5f609ed28b158bc2f4016abea3c7f305 Signed-off-by: kalyani chidambaram <kalyanic@nvidia.com>
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Varun Wadekar authored
The BPMP firmware takes some time to initialise its state on exiting System Suspend state. The CPU needs to synchronize with the BPMP during this process to avoid any race conditions. This patch suspends and resumes the BPMP interface across a System Suspend cycle, to fix this race. Change-Id: I82a61d12ef3eee267bdd8d4386bed23397fbfd2d Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch adds suspend and resume handlers for the BPMP interface. Mark the interface as "suspended" before entering System Suspend and verify that BPMP is alive on exit. Change-Id: I74ccbc86125079b46d06360fc4c7e8a5acfbdfb2 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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