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  1. 18 Jan, 2019 12 commits
    • Anthony Zhou's avatar
      Tegra: common: fix defects flagged by MISRA scan · 4c994002
      Anthony Zhou authored 
      

Macro assert(e) request 'e' is a bool type, if useing other
type, MISRA report a "The Essential Type Model" violation,
Add a judgement to fix the defects, if 'e' is not bool type.

Remove unused code [Rule 2.5]
Fix the essential type model violation [Rule 10.6, 10.7]
Use local parameter to raplace function parameter [Rule 17.8]

Change-Id: Ifce932addbb0a4b063ef6b38349d886c051d81c0
Signed-off-by: default avatarAnthony Zhou <anzhou@nvidia.com>
      4c994002
    • Steven Kao's avatar
      Tegra: read-modify-write ACTLR_ELx registers · 75516c3e
      Steven Kao authored 
      

This patch changes direct writes to ACTLR_ELx registers to use
read-modify-write instead.

Change-Id: I6e0eaa6974583f3035cb3724088f3f1c849da229
Signed-off-by: default avatarSteven Kao <skao@nvidia.com>
      75516c3e
    • Varun Wadekar's avatar
      Tegra186: enable erratas for Cortex-A57 CPUs · 98312afc
      Varun Wadekar authored 
      

This patch enables the following erratas for Cortex-A57 CPUs:

- ERRATA_A57_806969
- ERRATA_A57_813419
- ERRATA_A57_813420
- ERRATA_A57_826974
- ERRATA_A57_826977
- ERRATA_A57_828024
- ERRATA_A57_829520
- ERRATA_A57_833471

Change-Id: Ib18b7654607b967b70082f683686a16f52637442
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      98312afc
    • Anthony Zhou's avatar
      Tegra186: fix defects flagged by MISRA scan · 9e7a2436
      Anthony Zhou authored 
      

Main fixes:

Remove unused type conversion

Fix invalid use of function pointer [Rule 1.3]

Fix variable essential type doesn't match [Rule 10.3]

Voided non c-library functions whose return types are not used
 [Rule 17.7]

Change-Id: I23994c9d4d6a240080933d848d2b03865acaa833
Signed-off-by: default avatarAnthony Zhou <anzhou@nvidia.com>
      9e7a2436
    • Samuel Payne's avatar
      Tegra210: se: disable SMMU before suspending SE block · 86d0a52b
      Samuel Payne authored 
      

This patch disables SMMU hardware before suspending the SE
block, for the context save operation to complete. The NS
word will re-enable SMMU when we exit System Suspend.

Change-Id: I4d5cd982ea6780db5c38b124550d847e3928c60d
Signed-off-by: default avatarSamuel Payne <spayne@nvidia.com>
      86d0a52b
    • Anthony Zhou's avatar
      Tegra: common: drivers: fix MISRA defects · 61beb3e0
      Anthony Zhou authored 
      

Main fixes:

Add suffix U for constant [Rule 10.1]

Match the operands type [Rule 10.4]

Use UL replace U for that constant define that need do "~"
operation [Rule 12.4]

Voided non c-library functions whose return types are not used
 [Rule 17.7]

Change-Id: Ia1e814ca3890eab7904be9c79030502408f30936
Signed-off-by: default avatarAnthony Zhou <anzhou@nvidia.com>
      61beb3e0
    • Anthony Zhou's avatar
      Tegra: pm: fix MISRA defects · b36aea5a
      Anthony Zhou authored 
      

Main fixes:

* Use int32_t replace int, use uint32_t replace unsign int
  [Rule 4.6]
* Add function define to header file [Rule 8.4]
* Added curly braces ({}) around if statements in order to
  make them compound [Rule 15.6]
* Voided non c-library functions whose return types are not used
  [Rule 17.7]

Change-Id: Ifa3ba4e75046697cfede885096bee9a30efe6519
Signed-off-by: default avatarAnthony Zhou <anzhou@nvidia.com>
      b36aea5a
    • Varun Wadekar's avatar
      Tegra186: reduce complexity for the 'get_target_pwr_state' handler · 4e1830a9
      Varun Wadekar authored 
      

This patch reduces the code complexity for the platform's 'get_target_pwr_state'
handler, by reducing the number of 'if' conditions and adding helper functions
to calculate power state for the cluster/system.

Tested with 'pmccabe'

Change-Id: I32fa4c814bd97f620f2003fa39f1bfceae563771
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      4e1830a9
    • Varun Wadekar's avatar
      Tegra: fix MISRA defects in tegra_bl31_setup.c · fcf23a14
      Varun Wadekar authored 
      

Main fixes:

Add parentheses to avoid implicit operator precedence [Rule 12.1]

Fixed if statement conditional to be essentially boolean [Rule 14.4]

Added curly braces ({}) around if statements in order to
make them compound [Rule 15.6]

Voided non c-library functions whose return types are not used [Rule 17.7]

Bug 200272157

Change-Id: Ic3ab5a3de95aeb6d2265df940f7fb35ea0f19ab0
Signed-off-by: default avatarAnthony Zhou <anzhou@nvidia.com>
      fcf23a14
    • Varun Wadekar's avatar
      Tegra: gpcdma: driver for general purpose DMA · 647d4a03
      Varun Wadekar authored 
      

This patch adds the driver for the general purpose DMA hardware
block on newer Tegra SoCs. The GPCDMA is a special purpose DMA
used to speed up memory copy operations to/from DRAM and TZSRAM.

This patch introduces a macro 'USE_GPC_DMA' to allow platforms
to override CPU based memory operations.

Change-Id: I3170d409c83b77e785437b1002a8d70188fabbeb
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      647d4a03
    • Samuel Payne's avatar
      Tegra210: SE: remove logic to enable atomic save/restore · 76a7cd33
      Samuel Payne authored 
      

This patch removes the logic to set the bit that enables atomic context
save/restore when we enter System suspend. The bootrom enables this bit
during cold boot and exit from System Suspend, so we can remove this
setting from the driver.

Change-Id: Id4e08d5048155c970f5e31d9c9dd676c07182ade
Signed-off-by: default avatarSamuel Payne <spayne@nvidia.com>
      76a7cd33
    • Anthony Zhou's avatar
      Tegra186: sip_calls: fix defects flagged by MISRA scan · 11c5b273
      Anthony Zhou authored 
      

Main fixes:

Added explicit casts (e.g. 0U) to integers in order for them to be
compatible with whatever operation they're used in [Rule 10.1]

Convert object type to match the type of function parameters
[Rule 10.3]

Force operands of an operator to the same type category [Rule 10.4]

Expressions resulting from the expansion of macro parameters
shall be enclosed in parentheses[Rule 20.7]

Change-Id: Ibdae1d18d299562ca2b96b2318b914601c9926b1
Signed-off-by: default avatarAnthony Zhou <anzhou@nvidia.com>
      11c5b273
  3. 16 Jan, 2019 26 commits
  5. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored 
      Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca339

 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  7. 18 Dec, 2018 1 commit