- 27 Jan, 2020 4 commits
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Andrew F. Davis authored
The 'info' structure contained what is only static data for this implementation of TI-SCI. Remove this indirection and remove the struct. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I2328fddf388bf7d56a56bd673c080e78c86fe072
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Andrew F. Davis authored
When all cores in a cluster are powered down the parent cluster can be also powered down. When the last core has requested powering down follow by sending the cluster power down sequence to the system power controller firmware. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I0ffeb339852c66ef62743aecd3e17ca20bad6216
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Andrew F. Davis authored
The core number is called 'core_id' but the processor and device IDs are called 'proc' and 'device'. Rename these to make them less confusing. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: I3d7c6dddd7aa37b5dee1aa9689ce31730e9c3b59
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Manish Pandey authored
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- 24 Jan, 2020 31 commits
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Mark Dykes authored
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Chris Kay authored
As on SGI platforms, SCPI is unsupported on SGM platforms. Change-Id: I556ed095b9eb55b72447230ee2725d3c76160a08 Signed-off-by: Chris Kay <chris.kay@arm.com>
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I76f5535f1cbdaf3fc1235cd824111d9afe8f7e1b
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Ia7072d82116b03904c1b3982f37d96347203e621
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I3421336230981d4cda301fa2cef24b94b08353b1
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Ib9f97be1972405e54dc9550266f5b8a6a55b93bf
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I460b35f5a4ec47b13d4e811bb20881ce314e9259
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Iad91e99e9d13254de23eb10e5f655253f253cf0d
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Iee98ded027c049d9f12d4bb5888c0496b3251b4e
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Id3d3efc7e7711d19f0223da823713b8390ad2f47
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I7d660d5a9d7e44601353c77e9b6ee4096a277d76
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I624c15d569db477506a74964bc828e1a932181d4
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I7aea86891e54522c88af5ff16795a575f9a9322d
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I8b19e833a4e1067e1cfcc9bfaede7854e0e63004
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Soby Mathew authored
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I327a8a2ab0f0e49bd62f413296c3b326393422b6
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Soby Mathew authored
* changes: Tegra194: mce: remove unused NVG functions Tegra194: support for NVG interface v6.6 Tegra194: smmu: add PCIE0R1 mc reg to system suspend save list Tegra194: enable driver for general purpose DMA engine Tegra194: access XUSB_PADCTL registers on Si/FPGA platforms Tegra194: organize the memory/mmio map to make it linear Tegra194: memctrl: enable mc sid OVERRIDE for PCIE0R1 Tegra194: support for boot params wider than 32-bits Tegra194: memctrl: set reorder depth limit for PCIE blocks Tegra194: memctrl: program MC_TXN_OVERRIDE reg for PTCR, MPCORE and MIU Tegra194: memctrl: set CGID_TAG_ADR instead of CGID_TAG_DEFAULT Tegra194: memctrl: update mss reprogramming as HW PROD settings Tegra194: memctrl: Disable PVARDC coalescer Tegra194: memctrl: force seswr/rd transactions as passsthru & coherent Tegra194: Request CG7 from last core in cluster Tegra194: toggle SE clock during context save/restore Tegra: bpmp: fix header file paths
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Soby Mathew authored
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Soby Mathew authored
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Manish Pandey authored
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- 23 Jan, 2020 5 commits
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Manish Pandey authored
* changes: intel: Add function to check fpga readiness intel: Add bridge control for FPGA reconfig intel: FPGA config_isdone() status query intel: System Manager refactoring intel: Refactor reset manager driver intel: Enable bridge access in Intel platform intel: Modify non secure access function
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Alexei Fedorov authored
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Alexei Fedorov authored
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Varun Wadekar authored
This patch removes unused functions from the NVG driver. * nvg_enable_power_perf_mode * nvg_disable_power_perf_mode * nvg_enable_power_saver_modes * nvg_disable_power_saver_modes * nvg_roc_clean_cache * nvg_roc_flush_cache Change-Id: I0387a40dec35686deaad623a8350de89acfe9393 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch updates the NVG interface header file to v6.6. Change-Id: I2f5df274bf820ba1c5df47d8dcbf7f5f056ff45f Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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