- 21 Jun, 2018 8 commits
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Sumit Garg authored
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
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Sumit Garg authored
synquacer uses GICv3 compliant GIC500. So enable proper GICv3 driver initialization. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
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Sumit Garg authored
synquacer has CCN-512 interconnect. So enable proper CCN driver initialization. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
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Sumit Garg authored
These functions describe the layout of the cores and clusters in order to support the PSCI framework. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
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Sumit Garg authored
As this platform supports direct entry to BL31 and no BL2, so populate BL32 and BL33 entrypoints with static memory load info. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
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Sumit Garg authored
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
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Sumit Garg authored
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
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Sumit Garg authored
synquacer supports direct entry to BL31 without BL1 and BL2 as SCP firmware does similar work. So this patch adds BL31 stub APIs. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
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- 12 Jun, 2018 1 commit
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Satoshi Ikawa authored
The slave ports of LD20 CCI-500 are connected as follows: S0: CA53 S1: CA72 Be careful because the slave interface is not arranged in the cluster number order (CA72: cluster 0, CA53: cluster 1). Root-caused-by: Tetsuya Yoshizaki <yoshizaki.tetsuya@socionext.com> Signed-off-by: Satoshi Ikawa <ikawa.satoshi@socionext.com>
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- 26 Mar, 2018 1 commit
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Jonathan Wright authored
Ensure (where possible) that switch statements in plat comply with MISRA rules 16.1 - 16.7. Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
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- 02 Feb, 2018 3 commits
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Masahiro Yamada authored
Looks like this is requirement in the pre-merge static analysis. misra_violation: [Required] MISRA C-2012 Rule 7.2 violation: Unsigned constants must be declared with U or u suffix. Adding ULL as requested. I used ULL() macros for BL*_{BASE,LIMIT} because they are referenced from linker scripts. Requested-by: David Cunado <david.cunado@arm.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Currently, the xlat region of the on-chip SRAM is always allocated for all BL images. The access to the on-chip SRAM is necessary for loading images from a USB memory device (i.e. when updating firmware), so unneeded for the usual boot procedure. To avoid this waste, allocate the xlat region dynamically only for BL2, and only when it is necessary. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Commit 247fc043 ("uniphier: switch to BL2-AT-EL3 and remove BL1 support") accidentally changed the location of BL31 and BL32. The new memory map overlaps with the audio DSP images, also gives impact to OP-TEE. They are both out of control of ARM Trusted Firmware, so not easy to change. This commit restores the image layout that was originally used prior to the BL2-AT-EL3 migration. Reported-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 01 Feb, 2018 2 commits
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Masahiro Yamada authored
Allow to handle GZIP-compressed images by giving FIP_GZIP=1 from the command line. - Images are GZIP-compressed, then packed into FIP. If Trusted Board Boot is enabled, certificates are generated based on the compressed images. - GZIP decompressor is linked into BL2 to decompress images at run-time. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
In the next commit, I will have more usecases to get struct image_info from image ID. It is better to make a helper function at a different layer. I do not need the current uniphier_image_descs_fixup() since the code is small enough to be squashed into the caller side. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 24 Jan, 2018 2 commits
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Masahiro Yamada authored
UniPhier platform implements non-TF boot ROM. Prior to the BL2-AT-EL3 support, BL1 (worked as a pseudo ROM) was needed just for ensuring BL2 is entered at EL1-S. Now, this platform is able to avoid this waste. Enable the BL2_AT_EL3 option, and remove BL1. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The warm boot mailbox code is compiled if PROGRAMMABLE_RESET_ADDRESS is disabled. The warm boot mailbox is useless for UniPhier SoC family because BL1 is not the first image. The UniPhier platform implements non-TF ROM, then BL1 works as a pseudo ROM, so it is never executed in the warm boot. The reset vector address is not actually programmable for UniPhier platform, but it should not hurt to enable PROGRAMMABLE_RESET_ADDRESS to disable the mailbox and remove pointless plat_get_my_entrypoint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 22 Jan, 2018 1 commit
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Soby Mathew authored
The `override ERROR_DEPRECATION = 1` setting in uniphier platform makes deprecation of API difficult. Hence removing the same. This flag should be specified on the command line if needed. Change-Id: I8c82d8d13944e450a8cd636de3326137c04d7560 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 04 Jan, 2018 1 commit
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Masahiro Yamada authored
It is not necessary to read data from stdin. The input file name is ripped off by -n option, anyway. I still use the redirect for the output to specify the output file name. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 20 Dec, 2017 2 commits
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Masahiro Yamada authored
The build log should be indented with two spaces for correct alignment. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The current IO block buffer overlaps with BL2 image location. So, BL2 may corrupt itself. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 30 Nov, 2017 1 commit
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David Cunado authored
Pre-v8.2 platforms such as the Juno platform does not have the Scalable Vector Extensions implemented and so the build option ENABLE_SVE is set to zero. This has a minor performance improvement with no functional impact. Change-Id: Ib072735db7a0247406f8b60e325b7e28b1e04ad1 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 06 Nov, 2017 1 commit
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Masahiro Yamada authored
Building the UniPhier platform in parallel with TRUSTED_BOARD_BOOT=1 could fail due to non-existing directory. It might be difficult to reproduce, but here is an easier way to trigger the problem: $ make PLAT=uniphier TRUSTED_BOARD_BOOT=1 MBEDTLS_DIR=mbedtls certificates OPENSSL build/uniphier/release/rot_key.pem /bin/sh: 1: cannot create build/uniphier/release/rot_key.pem: Directory nonexistent make: *** [build/uniphier/release/rot_key.pem] Error 2 The $(ROT_KEY) must depend on $(BUILD_PLAT) so that the build directory is created before the key. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 18 Oct, 2017 1 commit
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Masahiro Yamada authored
This is not executable code. It should be put into .rodata instead of .text section. This produces more correct BL1 image when SEPARATE_CODE_AND_RODATA is defined. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 16 Oct, 2017 1 commit
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Jeenu Viswambharan authored
Change-Id: I795ec540942130b5ddc0fa1fd7167f7e1d1ae967 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 27 Sep, 2017 1 commit
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Douglas Raillard authored
Uses the xlat tables library's Makefile instead of directly including the source files in the Uniphier platform port. Change-Id: I27294dd71bbf9bf3e82973c75324652b037e5bce Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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- 01 Sep, 2017 2 commits
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Masahiro Yamada authored
Due to a bug in the Boot ROM, the USB load API turned out not working as expected. It is unfixable because the Boot ROM is hard-wired. Add work around code in TF to bypass the problematic Boot ROM code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
checkpatch.pl from Linux reports tons of coding style errors and warnings. I am just fixing under plat/socionext/uniphier/. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 26 Jul, 2017 1 commit
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Sandrine Bailleux authored
In a previous patch, the xlat_ctx_t type has been made public. This patch now makes the *_ctx() APIs public. Each API now has a *_ctx() variant. Most of them were already implemented and this patch just makes them public. However, some of them were missing so this patch introduces them. Now that all these APIs are public, there's no good reason for splitting them accross 2 files (xlat_tables_internal.c and xlat_tables_common.c). Therefore, this patch moves all code into xlat_tables_internal.c and removes xlat_tables_common.c. It removes it from the library's makefile as well. This last change introduces a compatibility break for platform ports that specifically include the xlat_tables_common.c file instead of including the library's Makefile. The UniPhier platform makefile has been updated to now omit this file from the list of source files. The prototype of mmap_add_region_ctx() has been slightly changed. The mmap_region_t passed in argument needs to be constant because it gets called from map_add(), which receives a constant region. The former implementation of mmap_add() used to cast the const qualifier away, which is not a good practice. Also remove init_xlation_table(), which was a sub-function of init_xlat_tables(). Now there's just init_xlat_tables() (and init_xlat_tables_ctx()). Both names were too similar, which was confusing. Besides, now that all the code is in a single file, it's no longer needed to have 2 functions for that. Change-Id: I4ed88c68e44561c3902fbebb89cb197279c5293b Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 20 Jun, 2017 1 commit
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Masahiro Yamada authored
Currently, ROTPK_NOT_DEPLOYED flag is set in plat_get_rotpk_info(). It is up to users how to retrieve ROTPK if the ROT verification is desired. This is not nice. This commit improves plat_get_rotpk_info() implementation and automates the ROTPK deployment. UniPhier platform has no ROTPK storage, so it should be embedded in BL1/BL2, like ARM_ROTPK_LOCATION=devel_rsa case. This makes sense because UniPhier platform implements its internal ROM i.e. BL1 is used as updatable pseudo ROM. Things work like this: - ROT_KEY (default: $(BUILD_PLAT)/rot_key.pem) is created if missing. Users can override ROT_KEY from the command line if they want to use a specific ROT key. - ROTPK_HASH is generated based on ROT_KEY. - ROTPK_HASH is included by uniphier_rotpk.S and compiled into BL1/BL2. - ROT_KEY is input to cert_create tool. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 15 Jun, 2017 1 commit
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Masahiro Yamada authored
Check the array index before the write. This issue was found by a static analysis tool. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 12 Jun, 2017 2 commits
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Masahiro Yamada authored
Add TSP to test BL32 without relying on external projects. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Initial commit for Socionext UniPhier SoC support. BL1, Bl2, and BL31 are supported. Refer to docs/plat/socionext-uniphier.md for more detais. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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