- 23 Nov, 2020 1 commit
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Jessica Clarke authored
This is not a standard string that any kernel recognises, nor do any of the FDTs embedded in kernels specify this, nor does QEMU's virt machine. Whilst its presence does no harm, it's not a thing code should consult as a result, and so drop it in order to not cause confusion and risk incorrect code being written to search for it. Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Change-Id: Iea3214a23181c54e600cf8f4f12dfc822140c23d
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- 20 Nov, 2020 3 commits
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Madhukar Pappireddy authored
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Manish Pandey authored
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Tanmay Jagdale authored
Include libraries needed to emulate Cortex-A72 on sbsa-ref target of QEMU. Signed-off-by: Tanmay Jagdale <tanmay.jagdale@linaro.org> Change-Id: I98cf17b1662c70898977a841af07e07b5cfca8ba
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- 19 Nov, 2020 8 commits
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Manish V Badarkhe authored
Renamed SMC API from "plat_smccc_feature_available" to "plat_is_smccc_feature_available" as per the current implementation. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ib0fa400816fba61039c2029a9e127501a6a36811
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Manish Pandey authored
* changes: docs: marvell: Update build documentation to reflect mrvl_bootimage and mrvl_flash changes plat: marvell: armada: Add new target mrvl_bootimage plat: marvell: armada: a3k: Add support for building $(DOIMAGETOOL)
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Pali Rohár authored
Also add example how to build TF-A for A3720 Turris MOX board and also fix style/indentation issues and information about default values. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I2dc957307b1b627b403a8d960e85f5ac9e15aee5
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Pali Rohár authored
This new target builds boot-image.bin binary as described in documentation. This image does not contain WTMI image and therefore WTP repository is not required for building. Having ability to build just this boot-image.bin binary without full flash-image.bin is useful for A3720 Turris MOX board which does not use Marvell's WTP and a3700_utils. To reduce duplicity between a8k and a3k code, define this new target and also definitions for $(BUILD_PLAT)/$(BOOT_IMAGE) in common include file marvell_common.mk. For this purpose it is needed to include plat/marvell/marvell.mk file from a3700_common.mk unconditionally (and not only when WTP is defined). Now when common file plat/marvell/marvell.mk does not contain definition for building $(DOIMAGETOOL), it is possible to move its inclusion at the top of the a3700_common.mk file. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ic58303b37a1601be9a06ff83b7a279cb7cfc8280
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Pali Rohár authored
Current binary wtptp/linux/tbb_linux which is specified in $(DOIMAGETOOL) variable points to external pre-compiled Marvell x86_64 ELF linux binary from A3700-utils-marvell WTP repository. It means that currently it is not possible to compile TF-A for A3720 on other host platform then linux x86_64. Part of the A3700-utils-marvell WTP repository is also source code of $(DOIMAGETOOL) TBB_Linux tool. This change adds support for building $(DOIMAGETOOL) also for a3k platform. After running $(MAKE) at appropriate subdirectory of A3700-utils-marvell WTP repository, compiled TBB_linux tool will appear in WTP subdirectory wtptp/src/TBB_Linux/release/. So update also $(DOIMAGETOOL) variable to point to the correct location where TBB_linux was built. To build TBB_linux it is required to compile external Crypto++ library which is available at: https://github.com/weidai11/cryptopp.git User needs to set CRYPTOPP_PATH option to specify path to that library. After this change it is now possible to build whole firmware for A3720 platform without requirement to use pre-compiled/proprietary x86_64 executable binaries from Marvell. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I6f26bd4356778a2f8f730a223067a2e550e6c8e0
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Madhukar Pappireddy authored
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Madhukar Pappireddy authored
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Madhukar Pappireddy authored
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- 18 Nov, 2020 1 commit
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Madhukar Pappireddy authored
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- 17 Nov, 2020 4 commits
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Manish Pandey authored
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Manish V Badarkhe authored
Updated the minor version to '4' to indicate 2.4 release Change-Id: Ib142fa15baeb43025fae371c7649199b8121c18f Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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Joanna Farley authored
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Chris Kay authored
Change-Id: I67c9db2fc6d4b83fec2d001745b9305102d4a2ae Signed-off-by: Chris Kay <chris.kay@arm.com>
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- 13 Nov, 2020 1 commit
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Alexei Fedorov authored
This patch fixes the following compilation error reported by aarch64-none-elf-gcc 11.0.0: bl32/tsp/tsp_main.c: In function 'tsp_smc_handler': bl32/tsp/tsp_main.c:393:9: error: 'tsp_get_magic' accessing 32 bytes in a region of size 16 [-Werror=stringop-overflow=] 393 | tsp_get_magic(service_args); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ bl32/tsp/tsp_main.c:393:9: note: referencing argument 1 of type 'uint64_t *' {aka 'long long unsigned int *'} In file included from bl32/tsp/tsp_main.c:19: bl32/tsp/tsp_private.h:64:6: note: in a call to function 'tsp_get_magic' 64 | void tsp_get_magic(uint64_t args[4]); | ^~~~~~~~~~~~~ by changing declaration of tsp_get_magic function from void tsp_get_magic(uint64_t args[4]); to uint128_t tsp_get_magic(void); which returns arguments directly in x0 and x1 registers. In bl32\tsp\tsp_main.c the current tsp_smc_handler() implementation calls tsp_get_magic(service_args); , where service_args array is declared as uint64_t service_args[2]; and tsp_get_magic() in bl32\tsp\aarch64\tsp_request.S copies only 2 registers in output buffer: /* Store returned arguments to the array */ stp x0, x1, [x4, #0] Change-Id: Ib34759fc5d7bb803e6c734540d91ea278270b330 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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- 12 Nov, 2020 3 commits
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johpow01 authored
This errata workaround did not work as intended and was revised in subsequent SDEN releases so we are reverting this change. This is the patch being reverted: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4686 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I8554c75d7217331c7effd781b5f7f49b781bbebe
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johpow01 authored
This errata workaround did not work as intended and was revised in subsequent SDEN releases so we are reverting this change. This is the patch being reverted: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4684 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I560749a5b55e22fbe49d3f428a8b9545d6bdaaf0
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David Horstmann authored
Fix a number of typos and misspellings in TF-A documentation and comments. Signed-off-by: David Horstmann <david.horstmann@arm.com> Change-Id: I34c5a28c3af15f28d1ccada4d9866aee6af136ee
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- 09 Nov, 2020 2 commits
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Manish Pandey authored
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Manish V Badarkhe authored
Provide missed command line parameters such as KEY_ALG, HASH_ALG and KEY_SIZE while generating the FWU certificate. Signed-off-by: Gilad Ben Yossef <Gilad.BenYossef@arm.com> Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I017fa3fff844f4262ae2441cbc9fee909d357fb3
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- 29 Oct, 2020 2 commits
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Alexei Fedorov authored
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Manish Pandey authored
* changes: intel: common: Fix non-MISRA compliant code v2 intel: mailbox: Fix non-MISRA compliant code intel: mailbox: Mailbox error recovery handling intel: mailbox: Enable sending large mailbox command intel: mailbox: Use retry count in mailbox poll intel: mailbox: Ensure time out duration is predictive intel: mailbox: Read mailbox response even there is an error intel: mailbox: Driver now handles larger response intel: common: Change how mailbox handles job id & buffer intel: common: Improve readability of mailbox read response intel: SIP: increase FPGA_CONFIG_SIZE to 32 MB intel: common: Remove urgent from mailbox async intel: common: Improve mailbox driver readability
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- 28 Oct, 2020 7 commits
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David Horstmann authored
Currently, when RECLAIM_INIT_CODE is set, the stacks are scaled to ensure that the entirety of the init section can be reclaimed as stack. This causes an issue in lib/psci/aarch64/psci_helpers.S, where the stack size is used for cache operations in psci_do_pwrdown_cache_maintenance(). If the stacks are scaled, then the PSCI code may fail to invalidate some of the stack memory before power down. Resizing stacks is also not good for stability in general, since code that works with a small number of cores may overflow the stack when the number of cores is increased. Change to make every stack be PLATFORM_STACK_SIZE big, and allow the total stack to be smaller than the init section. Any pages of the init section not reclaimed as stack will be set to read-only and execute-never, for security. Change-Id: I10b3884981006431f2fcbec3864c81d4a8c246e8 Signed-off-by: David Horstmann <david.horstmann@arm.com>
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André Przywara authored
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Manish Pandey authored
* changes: intel: common: Clean up mailbox and sip header intel: clear 'PLAT_SEC_ENTRY' in early platform setup
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Manish Pandey authored
* changes: mediatek: mt8192: add timer support mediatek: mt8192: Add reboot function for PSCI mediatek: mt8192: add sys_cirq driver mediatek: mt8192: add GPIO driver support
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Dehui Sun authored
add timer driver. Signed-off-by: Dehui Sun <dehui.sun@mediatek.com> Change-Id: I07448d85a15bb14577b05e4f302860d609420ba7
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Nina Wu authored
Add system_reset function in psci ops Change-Id: If85be70b8ae9d6487e02626356f0ff1e78b76de9 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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gtk_pangao authored
1.add sys_cirq driver 2.add gic api for cirq Change-Id: Ie6802d6ddcf7dde3412a050736dfdc85f97cb51b Signed-off-by: gtk_pangao <gtk_pangao@mediatek.com>
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- 27 Oct, 2020 8 commits
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Andre Przywara authored
When issuing barrier instructions like DSB or DMB, we must make sure that the compiler does not undermine out efforts to fence off instructions. Currently the compiler is free to move the barrier instruction around, in respect to former or later memory access statements, which is not what we want. Add a compiler barrier to the inline assembly statement in our DEFINE_SYSOP_TYPE_FUNC macro, to make sure memory accesses are not reordered by the compiler. This is in line with Linux' definition: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/include/asm/barrier.h Since those instructions share a definition, apart from DSB and DMB this now also covers some TLBI instructions. Having a compiler barrier there also is useful, although we probably have stronger barriers in place already. Change-Id: If6fe97b13a562643a643efc507cb4aad29daa5b6 Reported-by: Alexandru Elisei <alexandru.elisei@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Manish Pandey authored
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Abdul Halim, Muhammad Hadi Asyrafi authored
This patch is used to fix remaining non compliant code for Intel SoCFPGA's mailbox and sip driver. These changes include: - Change non-interface required uint32_t into unsigned int - Change non-negative variable to unsigned int - Remove obsolete variable initialization to 0 Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I3a16c7621a5fc75eb614d97d72e44c86e7d53bf5
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Abdul Halim, Muhammad Hadi Asyrafi authored
This patch is used to fix remaining non compliant code for Intel SocFPGA's mailbox driver. These changes include: - adding integer literal for unsigned constant - fix non-boolean controlling expression - add braces even on conditional single statement bodies Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I0f8fd96a3540f35ee102fd2f2369b76fa73e39e1
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Chee Hong Ang authored
Attempt to restart the mailbox if the mailbox driver not able to write any data into the mailbox command buffer. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Change-Id: Ia45291c985844dec9da82839cac701347534d32b
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Abdul Halim, Muhammad Hadi Asyrafi authored
Allow mailbox command that is larger than mailbox command FIFO buffer size to be sent to SDM in multiple chunks. Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I683d5f1d04c4fdf57d11ecae6232b7ed3fc49e26
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Abdul Halim, Muhammad Hadi Asyrafi authored
Change the main loop inside mailbox poll function from while(1) to a retry counter named sdm_loop. This is to limit the maximum possible looping of the function and prevent unexpected behaviour. Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I63afad958fe5f656f6333b60d5a8b4c0ada3b23d
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Chee Hong Ang authored
For each count down of time out counter, wait for number of miliseconds to ensure the time out duration is predictive. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Change-Id: I0e92dd1ef1da0ef504ec86472cf0d3c88528930b
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