1. 10 Aug, 2018 2 commits
  2. 06 Aug, 2018 2 commits
  3. 03 Aug, 2018 11 commits
  4. 02 Aug, 2018 3 commits
  5. 01 Aug, 2018 3 commits
  6. 31 Jul, 2018 2 commits
  7. 30 Jul, 2018 5 commits
  8. 27 Jul, 2018 3 commits
  9. 26 Jul, 2018 9 commits
    • Andrew F. Davis's avatar
      ti: k3: common: Only enable caches early · 903f13d3
      Andrew F. Davis authored
      
      
      We can enter and exit coherency without any software operations,
      but HW_ASSISTED_COHERENCY has stronger implications that are
      causing issues. Until these can be resolved, only use the weaker
      WARMBOOT_ENABLE_DCACHE_EARLY flag.
      Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
      903f13d3
    • Andrew F. Davis's avatar
      GIC: Do not flush cache when unneeded · 9262eb54
      Andrew F. Davis authored
      
      
      When a platform enables its caches before it initializes the
      GICC/GICR interface then explicit cache maintenance is not
      needed. Remove these here.
      Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
      9262eb54
    • Andrew F. Davis's avatar
      PSCI: Fix logic error to skip cache flushing · 39a8fa70
      Andrew F. Davis authored
      
      
      If either USE_COHERENT_MEM or HW_ASSISTED_COHERENCY being true
      should cause us to not enter the ifdef block, then the logic
      is not correct here. Posibly bad use of De Morgan's law?
      Fix this.
      Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
      39a8fa70
    • Sughosh Ganu's avatar
      RAS: SGI: Add flags needed to build components for RAS feature · f29d1828
      Sughosh Ganu authored
      
      
      Add the various flags that are required to build the components needed
      to enable the RAS feature on SGI575 platform. By default, all flags
      are set to 0, disabling building of all corresponding components.
      
      Change-Id: I7f8536fba895043ef6e397cc33ac9126cb572132
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      f29d1828
    • Sughosh Ganu's avatar
      RAS: SGI575: Add platform specific RAS changes · 167dae4d
      Sughosh Ganu authored
      
      
      Add platform specific changes needed to add support for the RAS
      feature on SGI575 platform, including adding a mapping for the
      CPER buffer being used on SGI575 platform.
      
      Change-Id: I01a982e283609b5c48661307906346fa2738a43b
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      167dae4d
    • Sughosh Ganu's avatar
      RAS: SGI: Add platform handler for RAS interrupts · 485fc954
      Sughosh Ganu authored
      
      
      Add a platform specific handler for RAS interrupts and configure the
      platform RAS interrupts for EL3 handling. The interrupt handler passes
      control to StandaloneMM code executing in S-EL0, which populates the
      CPER buffer with relevant error information. The handler subsequently
      invokes the SDEI client which processes the information in the error
      information in the CPER buffer. The helper functions
      plat_sgi_get_ras_ev_map and plat_sgi_get_ras_ev_map_size would be
      defined for sgi platforms in the subsequent patch, which adds sgi575
      specific RAS changes.
      
      Change-Id: I490f16c15d9917ac40bdc0441659b92380108d63
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      485fc954
    • Sughosh Ganu's avatar
      SPM: SGI: Map memory allocated for secure partitions · d9523919
      Sughosh Ganu authored
      
      
      The secure partition manager reserves chunks of memory which are used
      for the S-EL0 StandaloneMM image and the buffers required for
      communication between the Non-Secure world with the StandaloneMM
      image. Add the memory chunks to relevant arrays for mapping the
      regions of memory with corresponding attributes.
      
      Change-Id: If371d1afee0a50ca7cacd55e16aeaca949d5062b
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      d9523919
    • Sughosh Ganu's avatar
      ARM platforms: Allow board specific definition of SP stack base · 2e4a509d
      Sughosh Ganu authored
      
      
      The SGI platforms need to allocate memory for CPER buffers. These
      platform buffers would be placed between the shared reserved memory
      and the per cpu stack memory, thus the need to redefine stack base
      pointer for these platforms. This patch allows each board in ARM
      platform to define the PLAT_SP_IMAGE_STACK_BASE.
      
      Change-Id: Ib5465448b860ab7ab0f645f7cb278a67acce7be9
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      2e4a509d
    • Sughosh Ganu's avatar
      SGI: Include arm_spm_def.h in platform_def.h · d9cc9372
      Sughosh Ganu authored
      
      
      Include arm_spm_def.h in the platform_def.h file. Without this
      inclusion, we get build errors like
      
      In file included from services/std_svc/spm/sp_setup.c:12:0:
      services/std_svc/spm/sp_setup.c: In function 'spm_sp_setup':
      services/std_svc/spm/sp_setup.c:61:57: error: 'PLAT_SPM_BUF_BASE'
        undeclared (first use in this function)
        write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, PLAT_SPM_BUF_BASE);
      
      Now that the platform_def.h includes arm_spm_def.h, remove inclusion
      of platform_def.h in arm_spm_def.h to remove the circular dependency.
      
      Change-Id: I5225c8ca33fd8d288849524395e436c3d56daf17
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      d9cc9372