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Information regarding platform compatibility policy
is added to the documentation.

Change-Id: If9f2a11160f81354ee2c678f0fca9d67fc7366e6
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Revert "sgm: increase SCP_BL2 maximum size"

drivers: mmc: Fix R2 response type definition

poplar: fix build error with POPLAR_RECOVERY=1

sgm: increase SCP_BL2 maximum size

The Poplar is broken on eMMC initialization because of commit
2a82a9c9 ("drivers: emmc: dw_mmc: Add response flag into response ID
definition").  It changes the driver behavior on response type handling
in dw_send_cmd(), because MMC_RESPONSE_R(2) and MMC_RESPONSE_R2 are
different things.  MMC core is still sending the former while we already
changed to check the latter in dw_mmc driver.

This patch fixes R2 response type in MMC core code.  It's the same
thing as what commit 94522ff7

 ("drivers: mmc: Fix R3 response type
definition") does for R3 response.

With this fix, Poplar is back to work.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Commit eba1b6b3

 ("plat/poplar: migrate to mmc framework") defines
variable 'info' without !POPLAR_RECOVERY protection, and hence causes
the following unused variable error with POPLAR_RECOVERY=1 build.

plat/hisilicon/poplar/bl1_plat_setup.c: In function ‘bl1_platform_setup’:
plat/hisilicon/poplar/bl1_plat_setup.c:95:25: error: unused variable ‘info’ [-Werror=unused-variable]
  struct mmc_device_info info;
                         ^~~~

The patches fixes the build error with POPLAR_RECOVERY=1.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

For sgm775 the SCP_BL2 build in debug mode is around 94KiB which
is higher than the maximum size for SCP_BL2.

This patch increase the maximum allowed size for SCP_BL2 to
96KiB.

Change-Id: Ibca0daadba41429301c651ae21cbba87e45ccddf
Signed-off-by: Elieva Pignat <Elieva.Pignat@arm.com>

Minor documentation fixes

Update release minor version string

Readme and Change-log updates for v1.6 release

aarch32: PAR_ADDR_MASK should explicitly use BIT_64

Change-Id: I67382383fc9d18ab57c7e51f793145cb14c6fec5
Signed-off-by: Sathees Balya <sathees.balya@arm.com>

Change-Id: I7855c9d3de104975bf3249bdf291c428f001d07a
Signed-off-by: Joanna Farley <joanna.farley@arm.com>

PAR register used here is a 64 bit register.
On AARCH32 BIT macro is BIT_32.
PAR_ADDR_MASK should then use BIT_64 to avoid overflow.
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Change-Id: Ib9a045200de4fcd00387b114cbbd006e46ad6a8b
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

Change-Id: Ia67a4786350c1c2ef55125cd6a318ae6d918c08e
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

Allwinner PMIC fixes

At the moment we have two I2C stub drivers (for the Allwinner and the
Marvell platform), which #include the actual .c driver file.
Change this into the more usual design, by renaming and moving the stub
drivers into platform specific header files and including these from the
actual driver file. The platform specific include directories make sure
the driver picks up the right header automatically.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

trusty: Fix return value of trusty_init()

BL31: Fix warning about BL32 init function

ARM platforms: Reintroduce coherent memory for BL1 and BL2

The value used to signal failure is 0. It is needed to return a different
value on success.

Change-Id: I2186aa7dfbfc825bfe7b3d5ae3c4de7af10ee44f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

The patch d323af9e

 removed the support for coherent memory in BL1 and
BL2 for ARM platforms. But the CryptoCell SBROM  integration depends
on use of coherent buffers for passing data from the AP CPU to the
CryptoCell. Hence this patch reintroduces support for coherent
memory in BL1 and BL2 if ARM_CRYPTOCELL_INTEG=1.

Change-Id: I011482dda7f7a3ec9e3e79bfb3f4fa03796f7e02
Signed-Off-by: Soby Mathew <soby.mathew@arm.com>

The expected value for failure is 0, so the warning only has to be shown
in that case. This is the way the TSPD has done it since it was
introduced, and the way SPM and OP-TEE do it.

Trusty wrongly returns 0 on success.

In the case of TLK, the return value of tlkd_init() is passed from the
secure world in register X1 when calling the SMC TLK_ENTRY_DONE.

Change-Id: I39106d67631ee57f109619f8830bf4b9d96155e6
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Even though we initialise the platform part and the I2C controller
itself at boot time, we actually only access the bus on power down.
Meanwhile a rich OS might have configured the I2C pins differently or
even disabled the controller.
So repeat the platform setup and controller initialisation just before
we actually access the bus to power off the system. This is safe,
because at this point the rich OS should no longer be running.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Drop the unnecessary check for the I2C pins being already configured as
I2C pins (we actually don't care).
Also avoid resetting *every* peripheral that is covered by the PRCM reset
controller, instead just clear the one line connected to the I2C controller.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Allow setting log level back to compile time value

When using the tf_log_set_max_level() function, one can dynamically
set the log level to a value smaller than then compile time specified
one, but not equal. This means that when the log level have been
lowered, it can't be reset to the previous value. This commit modifies
this function to allow setting the log level back to the compile time
value.

Fixes ARM-software/tf-issues#624

Change-Id: Ib157715c8835982ce4977ba67a48e18ff23d5a61
Signed-off-by: Junhan Zhou <Junhan@mellanox.com>

Update dependencies for ARM TF

- Linaro binaries:    18.04
- mbed TLS library:   2.12.0
- FVP model versions: 11.4 build 37

This patch updates the user guide documentation to reflect these
changes to the dependencies.

Change-Id: I454782ca43a0db43aeeef2ab3622f4dea9dfec55
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

CSS: Fix overrun if system power level is not available

Fix the Cortex-ares errata reporting function name

This patch fixes the name of the Cortex-ares errata function which was
previously named `cortex_a72_errata_report` which was an error.

Change-Id: Ia124df4628261021baa8d9a30308bc286d45712b
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

This patch fixes an array overrun in CSS scmi driver if the
system power domain level is less than 2. This was reported from
https://scan.coverity.com/projects/arm-software-arm-trusted-firmware



CID 308492

Change-Id: I3a59c700490816718d20c71141281f19b2b7e7f7
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

hikey960: Add development TBB support

Add support for Allwinner H6 + X-Powers AXP805 PMIC combination

This patch adds experimental support for TBB to the HiKey960 board. To
build and test with TBB modify the uefi-tools project platforms.config

+ATF_BUILDFLAGS=TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 SAVE_KEYS=1 \
  MBEDTLS_DIR=./mbedtls
Signed-off-by: Teddy Reed <teddy@casualhacking.io>

RAS: Fix assert condition