1. 23 May, 2014 1 commit
  2. 22 May, 2014 2 commits
    • Achin Gupta's avatar
      Introduce platform api to access an ARM GIC · dcc1816c
      Achin Gupta authored
      This patch introduces a set of functions which allow generic firmware
      code e.g. the interrupt management framework to access the platform
      interrupt controller. APIs for finding the type and id of the highest
      pending interrupt, acknowledging and EOIing an interrupt and finding
      the security state of an interrupt have been added. It is assumed that
      the platform interrupt controller implements the v2.0 of the ARM GIC
      architecture specification. Support for v3.0 of the specification for
      managing interrupts in EL3 and the platform port will be added in the
      future.
      
      Change-Id: Ib3a01c2cf3e3ab27806930f1be79db2b29f91bcf
      dcc1816c
    • Achin Gupta's avatar
      Introduce interrupt registration framework in BL3-1 · e1333f75
      Achin Gupta authored
      This patch introduces a framework for registering interrupts routed to
      EL3. The interrupt routing model is governed by the SCR_EL3.IRQ and
      FIQ bits and the security state an interrupt is generated in. The
      framework recognizes three type of interrupts depending upon which
      exception level and security state they should be handled in
      i.e. Secure EL1 interrupts, Non-secure interrupts and EL3
      interrupts. It provides an API and macros that allow a runtime service
      to register an handler for a type of interrupt and specify the routing
      model. The framework validates the routing model and uses the context
      management framework to ensure that it is applied to the SCR_EL3 prior
      to entry into the target security state. It saves the handler in
      internal data structures. An API is provided to retrieve the handler
      when an interrupt of a particular type is asserted. Registration is
      expected to be done once by the primary CPU. The same handler and
      routing model is used for all CPUs.
      
      Support for EL3 interrupts will be added to the framework in the
      future. A makefile flag has been added to allow the FVP port choose
      between ARM GIC v2 and v3 support in EL3. The latter version is
      currently unsupported.
      
      A framework for handling interrupts in BL3-1 will be introduced in
      subsequent patches. The default routing model in the absence of any
      handlers expects no interrupts to be routed to EL3.
      
      Change-Id: Idf7c023b34fcd4800a5980f2bef85e4b5c29e649
      e1333f75
  3. 06 May, 2014 2 commits
    • Dan Handley's avatar
      Refactor GIC header files · 8a4fb6f6
      Dan Handley authored
      Move the function prototypes from gic.h into either gic_v2.h or
      gic_v3.h as appropriate. Update the source files to include the
      correct headers.
      
      Change-Id: I368cfda175cdcbd3a68f46e2332738ec49048e19
      8a4fb6f6
    • Dan Handley's avatar
      Move include and source files to logical locations · 4ecca339
      Dan Handley authored
      Move almost all system include files to a logical sub-directory
      under ./include. The only remaining system include directories
      not under ./include are specific to the platform. Move the
      corresponding source files to match the include directory
      structure.
      
      Also remove pm.h as it is no longer used.
      
      Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
      4ecca339
  4. 17 Jan, 2014 1 commit
  5. 05 Dec, 2013 1 commit
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
  6. 27 Nov, 2013 1 commit