- 26 Oct, 2018 1 commit
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Chandni Cherukuri authored
On SGI platforms that include Ares CPUs, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1' register requires an explicit write to clear it to enable hotplug and idle to function correctly. The reset value of the CORE_PWRDN_EN bit is zero but it still requires this explicit clear to zero. This indicates that this could be a model related issue but for now this issue can be fixed be clearing the CORE_PWRDN_EN bit in the platform specific reset handler function. Change-Id: I8b9884ae27a2986d789bfec2e9ae792ef930944e Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 18 Oct, 2018 5 commits
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Chandni Cherukuri authored
The default values of 'plat_css_scmi_plat_info' is not applicable for all the platforms. There should be a provision to let platform code to register a platform specific instance of scmi_channel_plat_info_t. Add a new API 'plat_css_get_scmi_info' which lets the platform to register a platform specific instance of scmi_channel_plat_info_t and remove the default values. In addition to this, the existing 'plat_css_scmi_plat_info' structure is removed from the common code and instantiated for the platforms that need it. This allows for a consistent provisioning of the SCMI channel information across all the existing and upcoming platforms. Change-Id: I4fb65d7f2f165b78697b4677f1e8d81edebeac06 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
Dynamically populating the 'system-id' node in the HW_CONFIG dts makes it difficult to enforce memory overlap checks. So add the system-id node in the HW_CONFIG dts file as a place holder with 'platform-id' and 'config-id' set to zero. The code at BL2 stage determines the values of 'platform-id' and 'config-id' at runtime and updates the corresponding fields in the system-id node of HW_CONFIG dts. Change-Id: I2ca9980b994ac418da8afa0c72716ede10aff68a Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
To align the placement of ftds files with that of other Arm platforms, move the ftds files from plat/arm/css/sgi/ to plat/arm/board/sgi575. Change-Id: Id7c772eb5cf3d308d4e02a3c8099218e889a0e96 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
On SGI platforms, the interconnect is setup by the SCP and so the existing unused interconnect setup in sgi575 platform code can be removed. As a result of this, sgi_plat_config.c and sgi_bl1_setup.c files can be removed as these files are now empty or can be substainated by the existing weak functions. Change-Id: I3c883e4d1959d890bf2213a9be01f02551ea3a45 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
In preparation of adding support for upcoming SGI platforms, macros common to all the SGI platforms are moved into sgi_base_platform_def.h file. Macros that are specific to sgi575 platform remain in the platform_def.h file. In addition to this, the platform_def.h file is moved to sgi575 board directory. Also the ENT_CPU_SOURCES has been renamed to SGI_CPU_SOURCES and moved from sgi-common.mk to board specific makefile platform.mk Change-Id: Iccdd9f070f4feea232b9fbf4fdcc0ef2e8eccbf2 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 15 Oct, 2018 1 commit
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Deepak Pandey authored
macro jump_if_cpu_midr is used commonly by many arm platform. It has now been relocated to common place to remove duplication of code. Change-Id: Ic0876097dbc085df4f90eadb4b7687dde7c726da Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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- 11 Oct, 2018 1 commit
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Antonio Nino Diaz authored
This file is shared between FVP and all CSS platforms. While it may be true that some definitions can be common, it doesn't make sense conceptually. For example, the stack size depends on the platform and so does the SRAM size. After removing them, there are not enough common definitions to justify having this header, so the other definitions have been moved to the platform_def.h of FVP, board_css_def.h and arm_def.h. Change-Id: Ifbf4b017227f9dfefa1a430f67d7d6baae6a4ba1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 10 Oct, 2018 1 commit
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Deepak Pandey authored
This lets any future CSS platforms to use RESET_TO_BL31 flag. Change-Id: I32a90fce43cb0c6f4d33589653a0fd6a7ecc9577 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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- 03 Oct, 2018 1 commit
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Daniel Boulby authored
Mark the initialization functions found in the BL31 boot sequence as __init so they can be reclaimed when no longer needed. Change-Id: I687a89346419c7710ef5097feaa325d83c527697 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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- 02 Oct, 2018 1 commit
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Antonio Nino Diaz authored
This option makes it hard to optimize the memory definitions of all Arm platforms because any change in the common defines must work in all of them. The best thing to do is to remove it and move the definition to each platform's header. FVP, SGI and SGM were using the definitions in board_arm_def.h. The definitions have been copied to each platform's platform_def.h. Juno was already using the ones in platform_def.h, so there have been no changes. Change-Id: I9aecd11bbc72a3d0d7aad1ef9934d8df21dcfaf2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 28 Sep, 2018 1 commit
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Antonio Nino Diaz authored
- Remove references to removed build options. - Remove support for LOAD_IMAGE_V2=0. Change-Id: I296385ef2ebf829446c76a54400d73f963ed265f Tested-by: Nariman Poushin <nariman.poushin@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 26 Sep, 2018 1 commit
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John Tsichritzis authored
Fixed a Coverity defect by adding a runtime check to avoid potential NULL pointer dereference. Change-Id: I9a0aa0efd27334131ac835b43348658b436c657d Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 04 Sep, 2018 1 commit
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John Tsichritzis authored
Change-Id: Iac454c745543842bfeed004aee7a3f4fb94d37e1 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 03 Aug, 2018 2 commits
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Chandni Cherukuri authored
The Arm SGI platforms can switch to using SCMI. So enable support for SCMI and remove portions of code that would be unused after switching to SCMI. Change-Id: Ifd9e1c944745f703da5f970b5daf1be2b07ed14e Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
On SGI platforms, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1' register requires an explicit write to clear it for hotplug and idle to function correctly. The reset value of this bit is zero but it still requires this explicit clear to zero. This indicates that this could be a model related issue but for now this issue can be fixed be clearing the CORE_PWRDN_EN in the platform specific reset handler function. Change-Id: I4222930daa9a3abacdace6b7c3f4a5472ac0cb19 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 26 Jul, 2018 6 commits
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Sughosh Ganu authored
Add the various flags that are required to build the components needed to enable the RAS feature on SGI575 platform. By default, all flags are set to 0, disabling building of all corresponding components. Change-Id: I7f8536fba895043ef6e397cc33ac9126cb572132 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Add platform specific changes needed to add support for the RAS feature on SGI575 platform, including adding a mapping for the CPER buffer being used on SGI575 platform. Change-Id: I01a982e283609b5c48661307906346fa2738a43b Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Add a platform specific handler for RAS interrupts and configure the platform RAS interrupts for EL3 handling. The interrupt handler passes control to StandaloneMM code executing in S-EL0, which populates the CPER buffer with relevant error information. The handler subsequently invokes the SDEI client which processes the information in the error information in the CPER buffer. The helper functions plat_sgi_get_ras_ev_map and plat_sgi_get_ras_ev_map_size would be defined for sgi platforms in the subsequent patch, which adds sgi575 specific RAS changes. Change-Id: I490f16c15d9917ac40bdc0441659b92380108d63 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
The secure partition manager reserves chunks of memory which are used for the S-EL0 StandaloneMM image and the buffers required for communication between the Non-Secure world with the StandaloneMM image. Add the memory chunks to relevant arrays for mapping the regions of memory with corresponding attributes. Change-Id: If371d1afee0a50ca7cacd55e16aeaca949d5062b Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
The SGI platforms need to allocate memory for CPER buffers. These platform buffers would be placed between the shared reserved memory and the per cpu stack memory, thus the need to redefine stack base pointer for these platforms. This patch allows each board in ARM platform to define the PLAT_SP_IMAGE_STACK_BASE. Change-Id: Ib5465448b860ab7ab0f645f7cb278a67acce7be9 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Include arm_spm_def.h in the platform_def.h file. Without this inclusion, we get build errors like In file included from services/std_svc/spm/sp_setup.c:12:0: services/std_svc/spm/sp_setup.c: In function 'spm_sp_setup': services/std_svc/spm/sp_setup.c:61:57: error: 'PLAT_SPM_BUF_BASE' undeclared (first use in this function) write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, PLAT_SPM_BUF_BASE); Now that the platform_def.h includes arm_spm_def.h, remove inclusion of platform_def.h in arm_spm_def.h to remove the circular dependency. Change-Id: I5225c8ca33fd8d288849524395e436c3d56daf17 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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- 20 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 18 Jun, 2018 1 commit
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Roberto Vargas authored
Having these definitions in board_arm_def.h forces to all the arm platforms to use the same definition for PLAT_ARM_MEM_PROT_ADDR. This macro also enables the mem-protect mechanism, which means that all the arm platform has enabled mem-protect and they cannot get rid of it. Change-Id: Id29d2c51cbe6edc15f010a9f5a20c42266c48a08 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 15 Jun, 2018 3 commits
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Chandni Cherukuri authored
Remove the redundant SGI functions which map memory for BL1 and BL2. Change-Id: I651a06d0eb6d28263a56f59701bb3815f1ba93dc Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
Append a node to hw-config dtb which will include a property to hold the value of the SSC_VERSION register. This will be used by the BL33 stage to determine the platform-id and the config-id of the platform it is executing on. Change-Id: Ie7b1e5d8c1bbe0efdb7ef0714f14b7794ec6058e Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
Remove the existing method of populating the platform id in arg2 of BL33 which is no longer needed with dynamic configuration feature enabled as the BL33 will get this information directly via the config files. Add the tb_fw_config and hw_config dts files. Change-Id: I3c93fec2aedf9ef1f774a5f0969d2d024e47ed2c Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 16 May, 2018 2 commits
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Vishwanatha HG authored
The MT bit in MPIDR is always set for SGI platforms and so the core position calculation code is updated to take into account the thread affinity value as well. Change-Id: I7b2a52707f607dc3859c6bbcd2b145b7987cb4ed Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>
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Vishwanatha HG authored
Instead of instantiating a local copy of GICv3 driver data for SGI platforms, reuse the existing instance of GICv3 driver data available in the arm common platform code. Change-Id: If6f38e15d1f0e20cea96fff98091da300015d295 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>
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- 11 May, 2018 1 commit
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Chris Kay authored
SGI-575's NSRAM is neither in the same place nor the same size as Juno's. Change-Id: Id6d692e9c7e9c1360014bb525eda966ebe29c823 Signed-off-by: Chris Kay <chris.kay@arm.com>
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- 18 Apr, 2018 1 commit
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Sudipto Paul authored
SGI-575 platform is based on Cortex-A75 processor which has its MT bit in the MPIDR register set to '1'. So the Arm platform layer code has to be made aware of this. Signed-off-by: Sudipto Paul <sudipto.paul@arm.com>
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- 28 Mar, 2018 1 commit
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Nariman Poushin authored
Add support for System Guidance for Infrastructure platform SGI575. Change-Id: I0125c2ed4469fbc8367dafcc8adce770b6b3147d Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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