- 07 Dec, 2020 1 commit
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Yuchen Huang authored
When system resume, we want to print log as soon as possible. So we add uart save and restore api, and they will be called when systtem suspend and resume. Change-Id: I83b477fd2b39567c9c6b70534ef186993f7053ae Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com>
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- 21 Oct, 2020 1 commit
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Fengquan Chen authored
add timer driver. Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.com> Change-Id: I60a7273f922233a618a6163b802c0858ed89f75f
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- 01 Sep, 2020 1 commit
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Hsin-Yi Wang authored
Add jedec info for mt8173, mt8183, and mt8192. [1] http://www.softnology.biz/pdf/JEP106AV.pdf Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Change-Id: Iab36fd580131f0b09b27223fba0e9d1e187d9196
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- 30 Mar, 2020 1 commit
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Alexei Fedorov authored
This patch moves all GICv3 driver files into new added 'gicv3.mk' makefile for the benefit of the generic driver which can evolve in the future without affecting platforms. The patch adds GICv3 driver configuration flags 'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and 'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in 'GICv3 driver options' section of 'build-option.rst' document. NOTE: Platforms with GICv3 driver need to be modified to include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles. Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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- 10 Mar, 2020 1 commit
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Alexei Fedorov authored
This patch provides separation of GICD, GICR accessor functions and adds new macros for GICv3 registers access as a preparation for GICv3.1 and GICv4 support. NOTE: Platforms need to modify to include both 'gicdv3_helpers.c' and 'gicrv3_helpers.c' instead of the single helper file previously. Change-Id: I1641bd6d217d6eb7d1228be3c4177b2d556da60a Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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- 25 Feb, 2020 1 commit
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Andre Przywara authored
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all. Change-Id: I5c2fe3b6a667acf80c808cfec4a64059a2c9c25f Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 14 Feb, 2020 1 commit
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Xi Chen authored
The offset there is the virtual address space on the bus side (1-9GB for 8GB RAM), and that emi_mpu_set_region_protection will translate to the physical memory space (0-8GB). 8GB is 33-bit (the memory bus width is 33-bit on this platform), so 0x23FFFFFFFUL-EMI_PHY_OFFSET = 0x1_FFFF_FFFF. Change-Id: I7be4759ed7546f7e15a5868b6f08988928c34075 Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
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- 28 Jan, 2020 1 commit
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Louis Mayencourt authored
The Secure Configuration Register is 64-bits in AArch64 and 32-bits in AArch32. Use u_register_t instead of unsigned int to reflect this. Change-Id: I51b69467baba36bf0cfaec2595dc8837b1566934 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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- 24 Jan, 2020 1 commit
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Iee98ded027c049d9f12d4bb5888c0496b3251b4e
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- 26 Dec, 2019 1 commit
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Roger Lu authored
spm resume will restore Vmodem/Vcore voltages back based on the SPM_DVS_LEVEL. Change-Id: I37ff7ce4ba62219c1858acea816c5bc9ce6c493e Signed-off-by: Roger Lu <roger.lu@mediatek.com>
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- 25 Nov, 2019 2 commits
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James Liao authored
CPU0 is default on, so it doesn't need to run pwr_domain_on() at boot. CPU0 AARCH64 will be set in pwr_domain_suspend(), but it may encounter race condition with other CPUs. Now AARCH64 will be set with cluster on in pwr_domain_on(), and all CPUs on this cluster will be set together. It doesn't need to set AARCH64 again in pwr_domain_suspend(), so the race condition can be avoided. Change-Id: I5693ad56e4901f82badb0fc0d8d13e4c9acfe648 Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
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kenny liang authored
Implement rdist save/resore functions to support low power scenarios. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I9ddc077a04f843275fbe2e868cdd0bd00d622de7
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- 05 Nov, 2019 1 commit
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Roger Lu authored
1. Switch ARMPLL_LL/CCIPLL/MAINPLL/MPLL control to SPM 2. Switch CLKSQ1/TDCLKSQ control to SPM 3. Switch ck_off/axi_26m control to SPM BUG=b:136980838 TEST=system suspend/resume passed Change-Id: I5c8506f7cf16d5cdaeb5ef8caa60a2992a361e18 Signed-off-by: Roger Lu <roger.lu@mediatek.com>
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- 03 Oct, 2019 2 commits
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kenny liang authored
Add EMI MPU driver for DRAM protection. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I0355e084184b5396ad8ac99fff6ef9d050fb5e96
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kenny liang authored
Add DEVAPC driver to control protection. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I6a6dd1c0bffa372b6df2cb604ca5e02eabbb9d26
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- 16 Sep, 2019 5 commits
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kenny liang authored
Add MCDI driver for power saving. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I93ecff4d7581f678be09dd8fb5dfaaccd5f2c22c
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kenny liang authored
Add MTK SSPM driver. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I30dd9a95456b8c3c8d18fd22120824eec97634ee
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kenny liang authored
Add MTK SPM driver for suspend/resume scenario. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I8207eea95914da9e63c62f3afc8329f3ccd9a22c
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kenny liang authored
Add uart clock gate contol for suspend/resume scenario. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: Id4197b0720630ec6c74aec206a9b206511bf515a
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kenny liang authored
Configure MCUSYS DCM. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: Ib810125b514cbcc43c770377bc71a29a05a19320
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- 10 Sep, 2019 7 commits
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Hung-Te Lin authored
When built for coreboot, we want to enable coreboot library to have better integration. For example, serial console should be initialized by coreboot_serial instead of hard-coded values. Most coreboot configuration will enable memory console, which needs larger XLAT_TABLES so MAX_XLAT_TABLES is increased; and to support that, TZRAM_SIZE also need to be enlarged. Change-Id: I08cf22df2fa26e48284e323d22ad8ce73a6ea803 Signed-off-by: Hung-Te Lin <hungte@chromium.org>
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kenny liang authored
Implement system reset handler. Change-Id: I535ee414616dde8d2b59dec5a723a540a3a1341d Signed-off-by: kenny liang <kenny.liang@mediatek.com>
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kenny liang authored
Add plat parameter structs to support BL2 to pass variable-length, variable-type parameters to BL31. The parameters are structured as a link list. During BL31 setup time, we traverse the list to process each parameter. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: Ie84cfc9606656fb1d2780a68cadf27e09afa6628
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kenny liang authored
Add GPIO driver. Change-Id: I8c35ce4ea247f3726081b0bbb95f0930c2b82517 Signed-off-by: kenny liang <kenny.liang@mediatek.com>
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kenny liang authored
- Add PMIC driver - Add RTC drvier - Refactor PMIC and RTC to mediatek/common - Implement system off handler Change-Id: If76497646ace1b78bc9a5fa0110b652fe512281a Signed-off-by: kenny liang <kenny.liang@mediatek.com>
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kenny liang authored
- Add DCM driver - Add SPMC driver - Implement core and cluster power on/off handlers Change-Id: I902002f8ea6f98fd73bf259188162b10d3939c72 Signed-off-by: kenny liang <kenny.liang@mediatek.com>
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kenny liang authored
Refine MTK GIC driver. Remove unused codes. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I39e05ce7aa3c257e237fbc8e661cdde65cbcec7c
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- 01 Aug, 2019 1 commit
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Julius Werner authored
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__. All common C compilers predefine a macro called __ASSEMBLER__ when preprocessing a .S file. There is no reason for TF-A to define it's own __ASSEMBLY__ macro for this purpose instead. To unify code with the export headers (which use __ASSEMBLER__ to avoid one extra dependency), let's deprecate __ASSEMBLY__ and switch the code base over to the predefined standard. Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 24 Jul, 2019 1 commit
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Julius Werner authored
The Mediatek MT8173/MT8183 SoCs are prime candidates for switching to the new bl31_params_parse() helper, so switch them over. This will allow BL2 implementations on these platforms to transparently switch over to the version 2 parameter structure. Change-Id: I0d17ba6c455102d325a06503d2078a76d12b5deb Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 12 Jul, 2019 1 commit
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: If5a88e1b880bcb2be2278398cf5109a6d877e632 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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- 06 Jun, 2019 2 commits
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kenny liang authored
add mcsi driver to support cache coherence. Change-Id: I94f5922783e5dbc6b7e92aa06464bc1f0177f00a Signed-off-by: kenny liang <kenny.liang@mediatek.com>
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kenny liang authored
Add Mediatek GIC driver to support interrupt functions. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I967a18f2e45b7bbc88c506dd4f1f40a745227ad9
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- 10 May, 2019 1 commit
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kenny liang authored
- Add basic platform setup - Add generic CPU helper functions - Add delay timer platform implementation - Use TI 16550 uart driver Change-Id: I1c29569c68fe9fca5e10e88a22a29690bab7141f Signed-off-by: kenny liang <kenny.liang@mediatek.com>
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