- 04 Sep, 2018 1 commit
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John Tsichritzis authored
Change-Id: Iac454c745543842bfeed004aee7a3f4fb94d37e1 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 22 Aug, 2018 1 commit
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Antonio Nino Diaz authored
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers. Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 03 Aug, 2018 5 commits
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Nariman Poushin authored
Add support for System Guidance for Mobile platform SGM775 Change-Id: I2442a50caae8f597e5e5949cd48f695cf75d9653 Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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Deepak Pandey authored
In css platforms where the cpu/cluster management is done by the hardware, software does need to issue certain scmi requests. This patch wraps those scmi calls around the HW_ASSISTED_COHERENCY build option to remove them on platforms that have this hardware support. Change-Id: Ie818e234484ef18549aa7f977aef5c3f0fc26c27 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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Nariman Poushin authored
Change-Id: I278d6876508800abff7aa2480910306a24de5378 Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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Chandni Cherukuri authored
The Arm SGI platforms can switch to using SCMI. So enable support for SCMI and remove portions of code that would be unused after switching to SCMI. Change-Id: Ifd9e1c944745f703da5f970b5daf1be2b07ed14e Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
On SGI platforms, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1' register requires an explicit write to clear it for hotplug and idle to function correctly. The reset value of this bit is zero but it still requires this explicit clear to zero. This indicates that this could be a model related issue but for now this issue can be fixed be clearing the CORE_PWRDN_EN in the platform specific reset handler function. Change-Id: I4222930daa9a3abacdace6b7c3f4a5472ac0cb19 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 26 Jul, 2018 6 commits
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Sughosh Ganu authored
Add the various flags that are required to build the components needed to enable the RAS feature on SGI575 platform. By default, all flags are set to 0, disabling building of all corresponding components. Change-Id: I7f8536fba895043ef6e397cc33ac9126cb572132 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Add platform specific changes needed to add support for the RAS feature on SGI575 platform, including adding a mapping for the CPER buffer being used on SGI575 platform. Change-Id: I01a982e283609b5c48661307906346fa2738a43b Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Add a platform specific handler for RAS interrupts and configure the platform RAS interrupts for EL3 handling. The interrupt handler passes control to StandaloneMM code executing in S-EL0, which populates the CPER buffer with relevant error information. The handler subsequently invokes the SDEI client which processes the information in the error information in the CPER buffer. The helper functions plat_sgi_get_ras_ev_map and plat_sgi_get_ras_ev_map_size would be defined for sgi platforms in the subsequent patch, which adds sgi575 specific RAS changes. Change-Id: I490f16c15d9917ac40bdc0441659b92380108d63 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
The secure partition manager reserves chunks of memory which are used for the S-EL0 StandaloneMM image and the buffers required for communication between the Non-Secure world with the StandaloneMM image. Add the memory chunks to relevant arrays for mapping the regions of memory with corresponding attributes. Change-Id: If371d1afee0a50ca7cacd55e16aeaca949d5062b Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
The SGI platforms need to allocate memory for CPER buffers. These platform buffers would be placed between the shared reserved memory and the per cpu stack memory, thus the need to redefine stack base pointer for these platforms. This patch allows each board in ARM platform to define the PLAT_SP_IMAGE_STACK_BASE. Change-Id: Ib5465448b860ab7ab0f645f7cb278a67acce7be9 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Include arm_spm_def.h in the platform_def.h file. Without this inclusion, we get build errors like In file included from services/std_svc/spm/sp_setup.c:12:0: services/std_svc/spm/sp_setup.c: In function 'spm_sp_setup': services/std_svc/spm/sp_setup.c:61:57: error: 'PLAT_SPM_BUF_BASE' undeclared (first use in this function) write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, PLAT_SPM_BUF_BASE); Now that the platform_def.h includes arm_spm_def.h, remove inclusion of platform_def.h in arm_spm_def.h to remove the circular dependency. Change-Id: I5225c8ca33fd8d288849524395e436c3d56daf17 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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- 20 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 12 Jul, 2018 2 commits
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Dimitris Papastamos authored
Change-Id: Iaebbeac1a1d6fbd531e5694b95ed068b7a193e62 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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Dimitris Papastamos authored
Change-Id: If07000b6b19011e960336a305a784dd643301b97 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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- 10 Jul, 2018 4 commits
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Roberto Vargas authored
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined Fixed for: make DEBUG=1 PLAT=juno SPD=tspd CSS_USE_SCMI_SDS_DRIVER=1 all Change-Id: Id732c8df12ef3e20903c41b7ab9a9b55341d68ac Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers. Fixed for: make DEBUG=1 PLAT=juno SPD=tspd CSS_USE_SCMI_SDS_DRIVER=1 all Change-Id: Id9dcc6238b39fac6046abc28141e3ef5e7aa998d Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined Fixed for: make DEBUG=1 PLAT=juno ARCH=aarch32 AARCH32_SP=sp_min RESET_TO_SP_MIN=1 JUNO_AARCH32_EL3_RUNTIME=1 bl32 Change-Id: I3ac25096b55774689112ae37bdf1222f9a9ecffb Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers. Fixed for: make DEBUG=1 PLAT=juno ARCH=aarch32 AARCH32_SP=sp_min RESET_TO_SP_MIN=1 JUNO_AARCH32_EL3_RUNTIME=1 bl32 Change-Id: Ia34f5155e1cdb67161191f69e8d1248cbaa39e1a Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 23 Jun, 2018 2 commits
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Nariman Poushin authored
In the case of the platform max power level being less than the system power level, make sure to not overrun the array of power states. This fixes Coverity Scan OVERRUN defect CID 267021. Change-Id: I52646ab9be2fceeb5c331b5dad7a6267991f4197 Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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Nariman Poushin authored
This is to fix a number of Coverity Scan DEADCODE defects, CID numbers listed below, as reported from https://scan.coverity.com/projects/arm-software-arm-trusted-firmware CID 267023 CID 267022 CID 267020 Change-Id: I2963a799b210149e84ccab5c5b9082267ddfe337 Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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- 18 Jun, 2018 1 commit
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Roberto Vargas authored
Having these definitions in board_arm_def.h forces to all the arm platforms to use the same definition for PLAT_ARM_MEM_PROT_ADDR. This macro also enables the mem-protect mechanism, which means that all the arm platform has enabled mem-protect and they cannot get rid of it. Change-Id: Id29d2c51cbe6edc15f010a9f5a20c42266c48a08 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 15 Jun, 2018 3 commits
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Chandni Cherukuri authored
Remove the redundant SGI functions which map memory for BL1 and BL2. Change-Id: I651a06d0eb6d28263a56f59701bb3815f1ba93dc Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
Append a node to hw-config dtb which will include a property to hold the value of the SSC_VERSION register. This will be used by the BL33 stage to determine the platform-id and the config-id of the platform it is executing on. Change-Id: Ie7b1e5d8c1bbe0efdb7ef0714f14b7794ec6058e Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
Remove the existing method of populating the platform id in arg2 of BL33 which is no longer needed with dynamic configuration feature enabled as the BL33 will get this information directly via the config files. Add the tb_fw_config and hw_config dts files. Change-Id: I3c93fec2aedf9ef1f774a5f0969d2d024e47ed2c Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 12 Jun, 2018 2 commits
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Daniel Boulby authored
Follow convention of shorter names for smaller scope to fix violations of MISRA rule 5.7 To prevent violation of directive 4.5 having variable name channel in css_pm_scmi.c not being typographically ambiguous change macro argument CHANNEL in css_mhu_doorbell.h change argument to _channel to fit with our convention which is a permitted exception of directive 4.5 for this project Rule 5.7: A tag name shall be a unique identifier Fixed for: make LOG_LEVEL=50 PLAT=juno Change-Id: I147cdb13553e83ed7df19149b282706db115d612 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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Daniel Boulby authored
Use a _ prefix for macro arguments to prevent that argument from hiding variables of the same name in the outer scope Rule 5.3: An identifier declared in an inner scope shall not hide an identifier declared in an outer scope Fixed For: make LOG_LEVEL=50 PLAT=juno Change-Id: I575fbc96e8267f2b075e88def1f6e3185394613a Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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- 07 Jun, 2018 1 commit
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Soby Mathew authored
The patch changes the layout of BL images in memory to enable more efficient use of available space. Previously BL31 was loaded with the expectation that BL2 memory would be reclaimed by BL32 loaded in SRAM. But with increasing memory requirements in the firmware, we can no longer fit BL32 in SRAM anymore which means the BL2 memory is not reclaimed by any runtime image. Positioning BL2 below BL1-RW and above BL31 means that the BL31 NOBITS can be overlaid on BL2 and BL1-RW. This patch also propogates the same memory layout to BL32 for AArch32 mode. The reset addresses for the following configurations are also changed : * When RESET_TO_SP_MIN=1 for BL32 in AArch32 mode * When BL2_AT_EL3=1 for BL2 The restriction on BL31 to be only in DRAM when SPM is enabled is now removed with this change. The update to the firmware design guide for the BL memory layout is done in the following patch. Change-Id: Icca438e257abe3e4f5a8215f945b9c3f9fbf29c9 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 16 May, 2018 2 commits
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Vishwanatha HG authored
The MT bit in MPIDR is always set for SGI platforms and so the core position calculation code is updated to take into account the thread affinity value as well. Change-Id: I7b2a52707f607dc3859c6bbcd2b145b7987cb4ed Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>
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Vishwanatha HG authored
Instead of instantiating a local copy of GICv3 driver data for SGI platforms, reuse the existing instance of GICv3 driver data available in the arm common platform code. Change-Id: If6f38e15d1f0e20cea96fff98091da300015d295 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>
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- 11 May, 2018 1 commit
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Chris Kay authored
SGI-575's NSRAM is neither in the same place nor the same size as Juno's. Change-Id: Id6d692e9c7e9c1360014bb525eda966ebe29c823 Signed-off-by: Chris Kay <chris.kay@arm.com>
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- 01 May, 2018 1 commit
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Roberto Vargas authored
Previously mem_protect used to be only supported from BL2. This is not helpful in the case when ARM TF-A BL2 is not used. This patch demonstrates mem_protect from el3_runtime firmware on ARM Platforms specifically when RESET_TO_BL31 or RESET_TO_SP_MIN flag is set as BL2 may be absent in these cases. The Non secure DRAM is dynamically mapped into EL3 mmap tables temporarily and then the protected regions are then cleared. This avoids the need to map the non secure DRAM permanently to BL31/sp_min. The stack size is also increased, because DYNAMIC_XLAT_TABLES require a bigger stack. Change-Id: Ia44c594192ed5c5adc596c0cff2c7cc18c001fde Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 18 Apr, 2018 1 commit
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Sudipto Paul authored
SGI-575 platform is based on Cortex-A75 processor which has its MT bit in the MPIDR register set to '1'. So the Arm platform layer code has to be made aware of this. Signed-off-by: Sudipto Paul <sudipto.paul@arm.com>
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- 16 Apr, 2018 1 commit
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Samarth Parikh authored
Currently the SCMI driver supports MHUv1, but Arm platforms may have varied versions of MHU driver, with MHUv2 controllers being in the latest Arm platforms. This patch updates the SCMI driver to support MHUv2, specifically that the sender must send the wake-up to the receiver before initiating any data transfer. Also, the existing mhu driver files, css_mhu.c and css_mhu.h, have been moved from the scpi directory to a new directory, css/drivers/mhu. Change-Id: I9b46b492a3e1d9e26db12d83a9773958a8c8402f Signed-off-by: Samarth Parikh <samarth.parikh@arm.com>
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- 13 Apr, 2018 1 commit
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Roberto Vargas authored
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers. Fixed for: make DEBUG=1 PLAT=juno LOG_LEVEL=50 all Change-Id: I0e4a03a0d2170cb1c632e079112a972091994a39 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 28 Mar, 2018 1 commit
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Nariman Poushin authored
Add support for System Guidance for Infrastructure platform SGI575. Change-Id: I0125c2ed4469fbc8367dafcc8adce770b6b3147d Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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- 28 Feb, 2018 1 commit
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Roberto Vargas authored
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined Fixed for: make DEBUG=1 PLAT=juno LOG_LEVEL=50 all Change-Id: Ic8f611da734f356566e8208053296e6c62b54709 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 26 Feb, 2018 1 commit
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Soby Mathew authored
This patch migrates the ARM Standard platforms to the new BL handover interface. The arm_blx_early_platform_setup() functions are also modified to take in 4 arguments. The `ARM_BL31_PLAT_PARAM_VAL` value passed to BL31 from BL2 is now in arg3 in preparation of dynamic configuration arguments. Change-Id: I33e8e61325a19e7a7127b1ff203c3b86921bf153 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 01 Feb, 2018 1 commit
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Masahiro Yamada authored
In the next commit, I need the image name in lowercase because output files are generally named in lowercase. Unfortunately, TOOL_ADD_IMG takes the first argument in uppercase since we generally use uppercase Make variables. make_helpers/build_macros.mk provides 'uppercase' macro to convert a string into uppercase, but 'lowercase' does not exist. We can implement it if we like, but it would be more straightforward to change the argument of TOOL_ADD_IMG. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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