1. 17 Dec, 2019 1 commit
    • Heiko Stuebner's avatar
      rockchip: really use base+size for secure ddr regions · 7f0b2e78
      Heiko Stuebner authored
      
      
      The calls to secure ddr regions on rk3288 and rk3399 use parameters of
      base and size - as it custom for specifying memory regions, but the
      functions themself expect start and endpoints of the area.
      
      This only works by chance for the TZRAM, as it starts a 0x0 and therefore
      its end location is the same as its size.
      
      To not fall into a trap later on adapt the functions to really take
      base+size parameters.
      Signed-off-by: default avatarHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
      Change-Id: Idb9fab38aa081f3335a4eca971e7b7f6757fbbab
      7f0b2e78
  2. 25 Apr, 2019 1 commit
    • Heiko Stuebner's avatar
      rockchip: add support for rk3288 · 780e3f24
      Heiko Stuebner authored
      
      
      The rk3288 is a 4-core Cortex-A12 SoC and shares a lot of features
      with later SoCs.
      
      Working features are general non-secure mode (the gic needs special
      love for that), psci-based smp bringing cpu cores online and also
      taking them offline again, psci-based suspend (the simpler variant
      also included in the linux kernel, deeper suspend following later)
      and I was also already able to test HYP-mode and was able to boot
      a virtual kernel using kvm.
      Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
      Change-Id: Ibaaa583b2e78197591a91d254339706fe732476a
      780e3f24