- 19 Mar, 2020 1 commit
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Varun Wadekar authored
This patch disables the code to program reset vector for secondary CPUs to a different entry point, than cold boot. The cold boot entry point has the ability to differentiate between a cold boot and a warm boot, that is controlled by the PROGRAMMABLE_RESET_ADDRESS macro. By reusing the same entry point, we can lock the CPU reset vector during cold boot. Change-Id: Iad400841d57c139469e1d29b5d467197e11958c4 Signed-off-by:
Varun Wadekar <vwadekar@nvidia.com>
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- 11 Mar, 2020 1 commit
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Pritesh Raithatha authored
SMMU and MC registers are saved as part of the System Suspend sequence. The register list includes some NS world SMMU registers that need to be saved by NS world software instead. All that remains as a result are the MC registers. This patch moves code to MC file as a result and renames all the variables and defines to use the MC prefix instead of SMMU. The Tegra186 and Tegra194 platform ports are updated to provide the MC context register list to the parent driver. The memory required for context save is reduced due to removal of the SMMU registers. Change-Id: I83a05079039f52f9ce91c938ada6cd6dfd9c843f Signed-off-by:
Pritesh Raithatha <praithatha@nvidia.com>
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- 23 Jan, 2019 3 commits
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Varun Wadekar authored
This patch adds support to save the system suspend entry and exit markers to TZDRAM to help the trampoline code decide if the current warmboot is actually an exit from System Suspend. The Tegra186 platform handler sets the system suspend entry marker before entering SC7 state and the trampoline flips the state back to system resume, on exiting SC7. Change-Id: I29d73f1693c89ebc8d19d7abb1df1e460eb5558e Signed-off-by:
Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch adds a helper function to get the SMMU context's offset and uses another helper function to get the CPU trampoline offset. These helper functions are used by the System Suspend entry sequence to save the SMMU context and CPU reset handler to TZDRAM. Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147 Signed-off-by:
Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch fixes the following MISRA violations: Rule 8.6: Externally-linked object or function has "no" definition(s). Rule 11.1: A cast shall not convert a pointer to a function to any other type. Change-Id: Ic1f6fc14c744e54ff782c6987dab9c9430410f5e Signed-off-by:
Varun Wadekar <vwadekar@nvidia.com>
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