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  1. 24 Aug, 2021 1 commit
  3. 17 Aug, 2021 1 commit
  5. 16 Aug, 2021 1 commit
    • Varun Wadekar's avatar
      refactor(tegra132): deprecate platform · d4ad3da0
      Varun Wadekar authored 
      

The Tegra132 platforms have reached their end of life and are
no longer used in the field. Internally and externally, all
known programs have removed support for this legacy platform.

This change removes this platform from the Tegra tree as a result.
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
Change-Id: I72edb689293e23b63290cdcaef60468b90687a5a
      d4ad3da0
  7. 13 Aug, 2021 1 commit
    • Pali Rohár's avatar
      refactor(plat/ea_handler): Use default ea handler implementation for panic · 30e8fa7e
      Pali Rohár authored 
      

Put default ea handler implementation into function plat_default_ea_handler()
which just print verbose information and panic, so it can be called also
from overwritten / weak function plat_ea_handler() implementation.

Replace every custom implementation of printing verbose error message of
external aborts in custom plat_ea_handler() functions by a common
implementation from plat_default_ea_handler() function.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I15897f61b62b4c3c29351e693f51d4df381f3b98
      30e8fa7e
  9. 12 Aug, 2021 1 commit
  11. 11 Aug, 2021 1 commit
  13. 10 Aug, 2021 2 commits
  15. 06 Aug, 2021 2 commits
  17. 02 Aug, 2021 2 commits
  19. 29 Jul, 2021 1 commit
  21. 28 Jul, 2021 3 commits
    • Stas Sergeev's avatar
      fix(plat/fvp): provide boot files via semihosting · 749d0fa8
      Stas Sergeev authored 
      These files are needed during boot, but they were missing
for semihosting.
With this patch, the list of files is complete enough to
boot on ATF platform via semihosting.

Change-Id: I2f0ca25983a6e18096f040780776f19f8040ea79
Signed-off-by: stsp@users.sourceforge.net
      749d0fa8
    • Jeremy Linton's avatar
      rpi4: SMCCC PCI implementation · ab061eb7
      Jeremy Linton authored 
      

The rpi4 has a single nonstandard ECAM. It is broken
into two pieces, the root port registers, and a window
to a single device's config space which can be moved
between devices. Now that we have widened the page
tables/MMIO window, we can create a read/write acces
functions that are called by the SMCCC/PCI API.

As an example platform, the rpi4 single device ECAM
region quirk is pretty straightforward. The assumption
here is that a lower level (uefi) has configured and
initialized the PCI root to match the values we are
using here.
Signed-off-by: default avatarJeremy Linton <jeremy.linton@arm.com>
Change-Id: Ie1ffa8fe9aa1d3c62e6aa84746a949c1009162e0
      ab061eb7
    • Jeremy Linton's avatar
      rpi4: enable RPi4 PCI SMC conduit · 6e63cdc5
      Jeremy Linton authored 
      

Now that we have adjusted the address map, added the
SMC conduit code, and the RPi4 PCI callbacks, lets
add the flags to enable everything in the build.

By default this service is disabled because the
expectation is that its only useful in a UEFI+ACPI
environment.
Signed-off-by: default avatarJeremy Linton <jeremy.linton@arm.com>
Change-Id: I2a3cac6d63ba8119d3b711db121185816b89f8a2
      6e63cdc5
  23. 23 Jul, 2021 5 commits
  25. 22 Jul, 2021 3 commits
    • Abdellatif El Khlifi's avatar
      feat: disabling non volatile counters in diphda · 7f70cd29
      Abdellatif El Khlifi authored 
      

At this stage of development Non Volatile counters are not implemented
in the Diphda platform.

This commit disables their use during the Trusted Board Boot by
overriding the NV counters get/set functions.

Change-Id: I8dcbebe0281cc4d0837c283ff637e20b850988ef
Signed-off-by: default avatarAbdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
      7f70cd29
    • Abdellatif El Khlifi's avatar
      feat: adding the diphda platform · bf3ce993
      Abdellatif El Khlifi authored 
      

This commit enables trusted-firmware-a with Trusted Board Boot support
for the Diphda 64-bit platform.

Diphda uses a FIP image located in the flash. The FIP contains the
following components:

- BL2
- BL31
- BL32
- BL32 SPMC manifest
- BL33
- The TBB certificates

The board boot relies on CoT (chain of trust). The trusted-firmware-a
BL2 is extracted from the FIP and verified by the Secure Enclave
processor. BL2 verification relies on the signature area at the
beginning of the BL2 image. This area is needed by the SecureEnclave
bootloader.

Then, the application processor is released from reset and starts by
executing BL2.

BL2 performs the actions described in the trusted-firmware-a TBB design
document.
Signed-off-by: default avatarRui Miguel Silva <rui.silva@arm.com>
Signed-off-by: default avatarAbdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Change-Id: Iddb1cb9c2a0324a9635e23821c210ac81dfc305d
      bf3ce993
    • Maksims Svecovs's avatar
      feat(ff-a): change manifest messaging method · bb320dbc
      Maksims Svecovs authored 
      

Align documentation with changes of messaging method for partition
manifest:
      - Bit[0]: support for receiving direct message requests
      - Bit[1]: support for sending direct messages
      - Bit[2]: support for indirect messaging
      - Bit[3]: support for managed exit
Change the optee_sp_manifest to align with the new messaging method
description.
Signed-off-by: default avatarMaksims Svecovs <maksims.svecovs@arm.com>
Change-Id: I333e82c546c03698c95f0c77293018f8dca5ba9c
      bb320dbc
  27. 21 Jul, 2021 2 commits
  29. 20 Jul, 2021 2 commits
  31. 19 Jul, 2021 1 commit
  33. 16 Jul, 2021 1 commit
    • Pali Rohár's avatar
      fix(plat/marvell/a3k): fix printing info messages on output · 9f6d1540
      Pali Rohár authored 
      

INFO() macro for every call prepends "INFO:   " string. Therefore
current code prints unreadable debug messages:

    "INFO:    set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0)INFO:    "
    "INFO:    Set IO decode window successfully, base(0xc000)INFO:     win_attr(3d) max_dram_win(2) max_remap(0)INFO:     win_offset(8)"

Fix it by calling exactly one INFO() call for one line. After this
change output is:

    "INFO:    set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0) remap(0x0)"
    "INFO:    Set IO decode window successfully, base(0xc000) win_attr(3d) max_dram_win(2) max_remap(0) win_offset(8)"
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I6084e64c6f4da6c1929e5300588e4ba2608ca745
      9f6d1540
  35. 13 Jul, 2021 4 commits
  37. 11 Jul, 2021 2 commits
    • Pali Rohár's avatar
      fix(plat/marvell/a3k): Fix building uart-images.tgz.bin archive · d3f8db07
      Pali Rohár authored 
      

For UART secure boot it is required also TIMN image, so pack it into
uart-images.tgz.bin archive which is created by mrvl_uart target.

$(TIMN_IMAGE) and $(TIM_IMAGE) variables are used only for UART images
so their content needs to be initialized from $(TIMN_UART_CFG) and
$(TIM_UART_CFG) config files. And not from $(TIMN_CFG) and $(TIM_CFG) as
it is now because they are not generated during mrvl_uart target. Fix it
to allow building mrvl_uart target before mrvl_flash target.

To match usage of these variables, rename them to $(TIMN_UART_IMAGE) and
$(TIM_UART_IMAGE).

To not complicate rule for building uart-images.tgz.bin archive, set
list of image files into a new $(UART_IMAGES) variable.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I83b980abb4047a3afb3ce3026842e1d873c490bf
      d3f8db07
    • Pali Rohár's avatar
      refactor(plat/marvell/a3k): Rename *_CFG and *_SIG variables · 618287da
      Pali Rohár authored 
      

For TIM config file use TIM name instead of DOIMAGE and use underscores
to make variable names more readable.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I1282ce11f1431c15458a143ae7bfcee85eed2432
      618287da
  39. 10 Jul, 2021 4 commits