- 20 Oct, 2017 1 commit
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davidcunado-arm authored
Add APIs to get and modify attributes of memory regions
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- 19 Oct, 2017 1 commit
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davidcunado-arm authored
uniphier: fix section of ROTPK hash
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- 18 Oct, 2017 4 commits
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davidcunado-arm authored
Update Foundation, AEM and Cortex Models versions
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davidcunado-arm authored
Fix use of MSR (immediate)
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Eleanor Bonnici authored
Trusted Firmware has been tested as part of its CI system against Cortex and Foundation models in the 11.1 Model release available on developer.arm.com. Trusted Firmware has also been tested against the v8.7 AEM model. This patch updates the user guide documentation to reflect the version of the Foundation, AEM and Cortex Models that Trusted Firmware has been tested against. Change-Id: Ia0f51469032427b6056567d151bf8144a7cf0e42 Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com>
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Masahiro Yamada authored
This is not executable code. It should be put into .rodata instead of .text section. This produces more correct BL1 image when SEPARATE_CODE_AND_RODATA is defined. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 17 Oct, 2017 7 commits
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davidcunado-arm authored
docs: Update Trusted Board Boot Requirements document number
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davidcunado-arm authored
Init and save / restore of PMCR_EL0 / PMCR
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davidcunado-arm authored
Update PSCI to v1.1
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Antonio Nino Diaz authored
The implementation is the same as those used to disable it in EL3. Change-Id: Ibfe7e69034a691fbf57477c5a76a8cdca28f6b26 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Sandrine Bailleux authored
This patch introduces a new API in the translation tables library (v2), that allows to change the memory attributes of a memory region. It may be used to change its execution permissions and data access permissions. As a prerequisite, the memory must be already mapped. Moreover, it must be mapped at the finest granularity (currently 4 KB). Change-Id: I242a8c6f0f3ef2b0a81a61e28706540462faca3c Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Sandrine Bailleux authored
This patch introduces a new API in the translation tables library (v2), that allows to query the memory attributes of a memory block or a memory page. Change-Id: I45a8b39a53da39e7617cbac4bff5658dc1b20a11 Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Previously, in AArch32, `IMAGE_XLAT_DEFAULT_REGIME` wasn't defined. The translation regime is only used in the AArch64 port of the translation tables library v2, so this is not a problem for now, but future patches will use it. `IMAGE_EL` isn't used in AArch32, so it isn't needed to define it. Change-Id: I4acdb01a58658956ab94bd82ed5b7fee1aa6ba90 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 16 Oct, 2017 4 commits
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davidcunado-arm authored
Integration of reset2 PSCI v1.1 functionality
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Roberto Vargas authored
The macro DEFINE_SYSREG_WRITE_CONST_FUNC defines an inline function to an assembly statement that uses the MSR (immediate) instruction to access the PSTATE. The "i" (immediate) assembly constraint on the operand was only satisfied when compiling with optimizations enabled which resulted in the function being optimized out - the "const uint64_t v" parameter was optimized out and replaced by a literal value. When compiling without optimizations, the function call remained and therefore the parameter is not optimized out - compilation fails as the constraint is impossible to satisfy by the compiler. This patch replaces the function encapsulating the use of the MSR (immediate) with a macro that allows the literal value to be directly fed to the inline assembly statement Change-Id: Ib379a7acc48ef3cb83090a680cd8a6ce1a94a9d9 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Qixiang Xu authored
Update DEN0006B-5(2013) to DEN0006C-1(2015) Change-Id: I753a14214dde827d004fd04c47b5ba112df38d73 Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
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davidcunado-arm authored
fiptool: Precursor changes for Visual Studio
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- 13 Oct, 2017 8 commits
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Roberto Vargas authored
This patch adds documentation about the new PCSI API to the porting guide and it also update the version and function list in the firmware design. Change-Id: Ie4edd190926a501922c061f5fcad53c9b389e331 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
Change-Id: Ie4ee8aa2627573c95549927c9ac4e8a963035359 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
Updated the PSCI version conforming to the PSCI v1.1 specification (ARM DEN022D). Change-Id: I1f34772ef6de37ec1ade719a1ab3aa062152d995 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
With this patch the PSCI_FEATURES API correctly reports availability of the PSCI_MEM_PROTECT_CHECK API - PSCI_MEM_CHK_RANGE_AARCH64 is added to the PSCI capabilities mask, PSCI_CAP_64BIT_MASK Change-Id: Ic90ee804deaadf0f948dc2d46ac5fe4121ef77ae Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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David Cunado authored
Currently TF does not initialise the PMCR_EL0 register in the secure context or save/restore the register. In particular, the DP field may not be set to one to prohibit cycle counting in the secure state, even though event counting generally is prohibited via the default setting of MDCR_EL3.SMPE to 0. This patch initialises PMCR_EL0.DP to one in the secure state to prohibit cycle counting and also initialises other fields that have an architectually UNKNOWN reset value. Additionally, PMCR_EL0 is added to the list of registers that are saved and restored during a world switch. Similar changes are made for PMCR for the AArch32 execution state. NOTE: secure world code at lower ELs that assume other values in PMCR_EL0 will be impacted. Change-Id: Iae40e8c0a196d74053accf97063ebc257b4d2f3a Signed-off-by: David Cunado <david.cunado@arm.com>
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Roberto Vargas authored
This function implements the platform dependant part of PSCI system reset2 for CSS platforms using SCMI. Change-Id: I724389decab484043cadf577aeed96b349c1466d Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
The common implementation of css_scp_sys_shutdown and css_scp_warm_reset is refactored into a new function, css_scp_system_off() that allows the desired power state to be specified. The css_scp_system_off can be used in the implementation of SYSTEM_RESET2 for PSCI v1.1. Change-Id: I161e62354d3d75f969b8436d794335237520a9a4 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
This patch implements PSCI_SYSTEM_RESET2 API as defined in PSCI v1.1 specification. The specification allows architectural and vendor-specific resets via this API. In the current specification, there is only one architectural reset, the warm reset. This reset is intended to provide a fast reboot path that guarantees not to reset system main memory. Change-Id: I057bb81a60cd0fe56465dbb5791d8e1cca025bd3 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 11 Oct, 2017 3 commits
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Evan Lloyd authored
In order to compile the source of Fiptool using Visual Studio a number of adjustments are required to the source. This commit modifies the source with changes that will be required, but makes no functional modification. The intent is to allow confirmation that the GCC build is unaffected. Change-Id: I4055bd941c646dd0a1aa2e24b940a1db3bf629ce Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
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davidcunado-arm authored
cert_tool: update for compatibility with OpenSSL v1.1
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davidcunado-arm authored
trusty: save/restore FPU registers in world switch
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- 09 Oct, 2017 3 commits
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davidcunado-arm authored
Improvements to the translation tables library v2
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davidcunado-arm authored
cert_tool: Fix ECDSA certificates create failure
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Qixiang Xu authored
Commit a8eb286a introduced the following error when creating ECDSA certificates. ERROR: Error creating key 'Trusted World key' Makefile:634: recipe for target 'certificates' failed make: *** [certificates] Error 1 this patch adds the function to create PKCS#1 v1.5. Change-Id: Ief96d55969d5e9877aeb528c6bb503b560563537 Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
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- 08 Oct, 2017 1 commit
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Michalis Pappas authored
This patch fixes incompatibility issues that prevent building the cert_tool with OpenSSL >= v1.1.0. The changes introduced are still backwards compatible with OpenSSL v1.0.2. Fixes arm-software/trusted-fw#521 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 06 Oct, 2017 5 commits
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davidcunado-arm authored
Fix assertion in GIC ITS helper
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Soby Mathew authored
This patch fixes an assertion check in the GICv3 ITS helper function. Change-Id: I75f50d7bf6d87c12c6e24a07c9a9889e5facf4a5 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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davidcunado-arm authored
Increase PLAT_ARM_MMAP_ENTRIES and MAX_XLAT_TABLES
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David Cunado authored
The MEM_PROTECT support adds a MMAP region for DRAM2, which when building with TBBR support and OP-TEE tsp requires an additional entry in the MMAP region array in BL2 - PLAT_ARM_MMAP_ENTRIES is increased. The MEM_PROTECT support also adds a new region in BL31, and when BL31 is placed in DRAM, the memory mappings require an additional translation table - MAX_XLAT_TABLES is increased. Change-Id: I0b76260da817dcfd0b8f73a7193c36efda977625 Signed-off-by: David Cunado <david.cunado@arm.com>
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davidcunado-arm authored
GICv3 context save and restore
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- 05 Oct, 2017 3 commits
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Douglas Raillard authored
Give hints on how to use the GICv3 save/restore helpers in the implementation of the PSCI handlers. Change-Id: I86de1c27417b64c7ce290974964ef97ff678f676 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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Soby Mathew authored
This patch adds functions to save and restore GICv3 ITS registers during system suspend. Please note that the power management of GIC ITS is implementation defined. These functions only implements the architectural part of the ITS power management and they do not restore memory structures or register content required to support ITS. Even if the ITS implementation stores structures in memory, an implementation defined power down sequence is likely to be required to flush some internal ITS caches to memory. If such implementation defined sequence is not followed, the platform must ensure that the ITS is not power gated during system suspend. Change-Id: I5f31e5541975aa7dcaab69b0b7f67583c0e27678 Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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Soby Mathew authored
During system suspend, the GICv3 Distributor and Redistributor context can be lost due to power gating of the system power domain. This means that the GICv3 context needs to be saved prior to system suspend and restored on wakeup. Currently the consensus is that the Firmware should be in charge of this. See tf-issues#464 for more details. This patch introduces helper APIs in the GICv3 driver to save and restore the Distributor and Redistributor contexts. The GICv3 ITS context is not considered in this patch because the specification says that the details of ITS power management is implementation-defined. These APIs are expected to be appropriately invoked by the platform layer during system suspend. Fixes ARM-software/tf-issues#464 Change-Id: Iebb9c6770ab8c4d522546f161fa402d2fe02ec00 Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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