1. 22 Mar, 2020 1 commit
  2. 31 Jan, 2019 3 commits
    • Varun Wadekar's avatar
      Tegra: support for System Suspend using sc7entry-fw binary · 3ca3c27c
      Varun Wadekar authored
      
      
      This patch adds support to enter System Suspend on Tegra210 platforms
      without the traditional BPMP firmware. The BPMP firmware will no longer
      be supported on Tegra210 platforms and its functionality will be
      divided across the CPU and sc7entry-fw.
      
      The sc7entry-fw takes care of performing the hardware sequence required
      to enter System Suspend (SC7 power state) from the COP. The CPU is required
      to load this firmware to the internal RAM of the COP and start the sequence.
      The CPU also make sure that the COP is off after cold boot and is only
      powered on when we want to start the actual System Suspend sequence.
      
      The previous bootloader loads the firmware to TZDRAM and passes its base and
      size as part of the boot parameters. The EL3 layer is supposed to sanitize
      the parameters before touching the firmware blob.
      
      To assist the warmboot code with the PMIC discovery, EL3 is also supposed to
      program PMC's scratch register #210, with appropriate values. Without these
      settings the warmboot code wont be able to get the device out of System
      Suspend.
      
      Change-Id: I5a7b868512dbfd6cfefd55acf3978a1fd7ebf1e2
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      3ca3c27c
    • Varun Wadekar's avatar
      Tegra: flowctrl: helper functions to assist with cluster power states · 1483d4e0
      Varun Wadekar authored
      
      
      This patch adds helper functions to help platforms with cluster state entry
      and exit decisions.
      
      * tegra_fc_ccplex_pgexit_lock(): lock CPU power ungate
      * tegra_fc_ccplex_pgexit_unlock(): unlock CPU power ungate
      * tegra_fc_is_ccx_allowed(): CCx state entry allowed on this CPU?
      
      Change-Id: I6490d34bf380dc03ae203eb3028f61984f06931c
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      1483d4e0
    • Varun Wadekar's avatar
      Tegra: flowctrl: support to enable/disable WDT's legacy FIQ routing · 2ed09b1e
      Varun Wadekar authored
      
      
      On earlier Tegra platforms, e.g. Tegra210, the watchdog timer's FIQ interrupt
      is not direclty wired to the GICD. It goes to the flow controller instead, for
      power state management. But the flow controller can route the FIQ to the GICD,
      as a PPI, which can then get routed to the target CPU.
      
      This patch adds routines to enable/disable routing the legacy FIQ used by
      the watchdog timers, to the GICD.
      
      Change-Id: Idd07c88c8d730b5f0e93e3a6e4fdc59bdcb2161b
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      2ed09b1e
  3. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  4. 08 Nov, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Standardise header guards across codebase · c3cf06f1
      Antonio Nino Diaz authored
      
      
      All identifiers, regardless of use, that start with two underscores are
      reserved. This means they can't be used in header guards.
      
      The style that this project is now to use the full name of the file in
      capital letters followed by 'H'. For example, for a file called
      "uart_example.h", the header guard is UART_EXAMPLE_H.
      
      The exceptions are files that are imported from other projects:
      
      - CryptoCell driver
      - dt-bindings folders
      - zlib headers
      
      Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      c3cf06f1
  5. 03 May, 2017 1 commit
  6. 13 Apr, 2017 1 commit
  7. 25 Nov, 2015 1 commit
  8. 29 May, 2015 1 commit
    • Varun Wadekar's avatar
      Support for NVIDIA's Tegra T210 SoCs · 08438e24
      Varun Wadekar authored
      
      
      T210 is the latest chip in the Tegra family of SoCs from NVIDIA. It is an
      ARM v8 dual-cluster (A57/A53) SoC, with any one of the clusters being active
      at a given point in time.
      
      This patch adds support to boot the Trusted Firmware on T210 SoCs. The patch
      also adds support to boot secondary CPUs, enter/exit core power states for
      all CPUs in the slow/fast clusters. The support to switch between clusters
      is still not available in this patch and would be available later.
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      08438e24