1. 27 May, 2021 1 commit
  2. 13 Oct, 2020 1 commit
  3. 08 Jul, 2020 3 commits
    • Etienne Carriere's avatar
      stm32mp1: register shared resource per GPIO bank/pin · ec8f4212
      Etienne Carriere authored
      
      
      Introduce helper functions stm32mp_register_secure_gpio() and
      stm32mp_register_non_secure_gpio() for drivers to register a
      GPIO pin as secure or non-secure.
      
      These functions are stubbed when shared resource driver is not
      embedded in the BL image so that drivers do not bother whether they
      shall register or not their resources.
      
      Change-Id: I1fe98576c072ae31f75427c9ac5c9f6c4f1b6ed1
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      ec8f4212
    • Etienne Carriere's avatar
      stm32mp1: register shared resource per IOMEM address · 0651b5b7
      Etienne Carriere authored
      
      
      Introduce helper functions stm32mp_register_secure_periph_iomem()
      and stm32mp_register_non_secure_periph_iomem() for drivers to
      register a resource as secure or non-secure based on its SoC
      interface registers base address.
      
      These functions are stubbed when shared resources driver is not
      embedded (!STM32MP_SHARED_RESOURCES) so that drivers embedded
      in other BL stages do not bother whether they shall register or
      not their resources.
      
      Change-Id: Icebd05a930afc5964bc4677357da5d1b23666066
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      0651b5b7
    • Etienne Carriere's avatar
      stm32mp1: shared resources: peripheral registering · 68450c94
      Etienne Carriere authored
      
      
      Define helper functions stm32mp_register_secure_periph() and
      stm32mp_register_non_secure_periph() for platform drivers to
      register a shared resource assigned to respectively secure
      or non-secure world.
      
      Some resources are related to clock resources. When a resource is
      registered as secure, ensure its clock dependencies are also
      registered as secure. Registering a non-secure resource does not
      mandate its clock dependencies are also registered as non-secure.
      
      Change-Id: I74975be8976b8d3bf18dcc807541a072803af6e3
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      68450c94
  4. 23 Jun, 2020 2 commits
    • Etienne Carriere's avatar
      stm32mp1: shared resources: apply registered configuration · 5f038ac6
      Etienne Carriere authored
      
      
      BL32/SP_MIN configures platform security hardening from the shared
      resources driver.  At the end of SP_MIN initialization, all shared
      resources shall be assigned to secure or non-secure world by
      drivers. A lock prevent from further change on the resource
      assignation. By definition, resources not registered are assign
      to non-secure world since not claimed by any component on the BL.
      
      No functional change as all resources are currently in state
      SHRES_UNREGISTERED hence assigned to non-secure world as prior
      this change in stm32mp1_etzpc_early_setup() and
      sp_min_platform_setup().
      
      Change-Id: Ic41fab47216c3b8b7a6a75b8358cfcec411ed941
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      5f038ac6
    • Etienne Carriere's avatar
      stm32mp1: introduce shared resources support · 47cf5d3f
      Etienne Carriere authored
      
      
      STM32MP1 SoC includes peripheral interfaces that can be assigned to
      the secure world, or that can be opened to the non-secure world.
      
      This change introduces the basics of a driver that manages such
      resources which assignation is done at run time. It currently offers
      API functions that state whether a service exposed to non-secure
      world has permission to access a targeted clock or reset controller.
      
      Change-Id: Iff20028f41586bc501085488c03546ffe31046d8
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      47cf5d3f
  5. 11 May, 2020 1 commit
    • Etienne Carriere's avatar
      plat/stm32mp1: fdt helpers for secure aware gpio bank · ccc199ed
      Etienne Carriere authored
      
      
      New helper functions to get GPIO banks configuration from the FDT.
      
      stm32_get_gpio_bank_pinctrl_node() allows stm32mp platforms to
      differentiate specific GPIO banks when these are defined with a specific
      path in the FDT.
      
      fdt_get_gpio_bank_pin_count() returns the number of pins in a GPIO bank
      as it depends on the SoC variant.
      
      Change-Id: I4481774152b3c6bf35bf986f58e357c2f9c19176
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      ccc199ed
  6. 05 May, 2020 1 commit
    • Andre Przywara's avatar
      plat/stm32: Use generic fdt_get_reg_props_by_name() · 7ad6d362
      Andre Przywara authored
      
      
      The STM32 platform port parse DT nodes to find base address to
      peripherals. It does this by using its own implementation, even though
      this functionality is generic and actually widely useful outside of the
      STM32 code.
      
      Re-implement fdt_get_reg_props_by_name() on top of the newly introduced
      fdt_get_reg_props_by_index() function, and move it to fdt_wrapper.c.
      This is removes the assumption that #address-cells and #size-cells are
      always one.
      
      Change-Id: I6d584930262c732b6e0356d98aea50b2654f789d
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      7ad6d362
  7. 29 Apr, 2020 1 commit
    • Andre Przywara's avatar
      plat/stm32: Implement fdt_read_uint32_default() as a wrapper · be858cff
      Andre Przywara authored
      
      
      The STM32 platform code uses its own set of FDT helper functions,
      although some of them are fairly generic.
      
      Remove the implementation of fdt_read_uint32_default() and implement it
      on top of the newly introduced fdt_read_uint32() function, then convert
      all users over.
      
      This also fixes two callers, which were slightly abusing the "default"
      semantic.
      
      Change-Id: I570533362b4846e58dd797a92347de3e0e5abb75
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      be858cff
  8. 28 Apr, 2020 1 commit
    • Andre Przywara's avatar
      plat/stm32: Use generic fdt_read_uint32_array() implementation · 52a616b4
      Andre Przywara authored
      
      
      The device tree parsing code for the STM32 platform is using its own FDT
      helper functions, some of them being rather generic.
      In particular the existing fdt_read_uint32_array() implementation is now
      almost identical to the new generic code in fdt_wrappers.c, so we can
      remove the ST specific version and adjust the existing callers.
      
      Compared to the original ST implementation the new version takes a
      pointer to the DTB as the first argument, and also swaps the order of
      the number of cells and the pointer.
      
      Change-Id: Id06b0f1ba4db1ad1f733be40e82c34f46638551a
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      52a616b4
  9. 26 Mar, 2020 1 commit
    • Yann Gautier's avatar
      stm32mp1: dynamically map DDR later and non-cacheable during its test · 84686ba3
      Yann Gautier authored
      
      
      A speculative accesses to DDR could be done whereas it was not reachable
      and could lead to bus stall.
      To correct this the dynamic mapping in MMU is used.
      A first mapping is done for DDR tests with MT_NON_CACHEABLE attribute,
      once DDR access is setup. It is then unmapped and a new mapping DDR is done
      with cacheable attribute (through MT_MEMORY) to speed-up BL33 (or OP-TEE)
      load.
      
      The disabling of cache during DDR tests is also removed, as now useless.
      A call to new functions stm32mp_{,un}map_ddr_non_cacheable() is done
      instead.
      
      PLAT_XLAT_TABLES_DYNAMIC is activated globally as used in BL2 and BL32.
      
      BL33 max size is also updated to take into account the secure and shared
      memory areas. Those are used in OP-TEE case.
      
      Change-Id: I22c48b4a48255ee264991c34ecbb15bfe87e67c3
      Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
      84686ba3
  10. 20 Jan, 2020 1 commit
  11. 03 Oct, 2019 1 commit
    • Lionel Debieve's avatar
      delay: timeout detection support · 0711ee5c
      Lionel Debieve authored
      
      
      Introduce timeout_init_us/timeout_elapsed() delay tracking with CNTPCT.
      
      timeout_init_us(some_timeout_us); returns a reference to detect
      timeout for the provided microsecond delay value from current time.
      
      timeout_elapsed(reference) return true/false whether the reference
      timeout is elapsed.
      
      Cherry picked from OP-TEE implementation [1].
        [1] commit 33d30a74502b ("core: timeout detection support")
      
      Minor:
      - Remove stm32mp platform duplicated implementation.
      - Add new include in marvell ble.mk
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@linaro.org>
      Signed-off-by: default avatarLionel Debieve <lionel.debieve@st.com>
      Change-Id: Iaef6d43c11a2e6992fb48efdc674a0552755ad9c
      0711ee5c
  12. 23 Sep, 2019 1 commit
    • Lionel Debieve's avatar
      stm32mp1: add authentication support for stm32image · 4bdb1a7a
      Lionel Debieve authored
      
      
      This commit adds authentication binary support for STM32MP1.
      It prints the bootrom authentication result if signed
      image is used and authenticates the next loaded STM32 images.
      It also enables the dynamic translation table support
      (PLAT_XLAT_TABLES_DYNAMIC) to use bootrom services.
      Signed-off-by: default avatarLionel Debieve <lionel.debieve@st.com>
      Change-Id: Iba706519e0dc6b6fae1f3dd498383351f0f75f51
      4bdb1a7a
  13. 20 Sep, 2019 1 commit
  14. 02 Sep, 2019 6 commits
  15. 17 Jun, 2019 2 commits
  16. 14 Feb, 2019 5 commits