- 22 Sep, 2017 2 commits
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Qixiang Xu authored
- fixed compile error when KEY_ALG=ecdsa - add new option ecdsa for TF_MBEDTLS_KEY_ALG - add new option devel_ecdsa for ARM_ROTPK_LOCATION - add ecdsa key at plat/arm/board/common/rotpk/ - reduce the mbedtls heap memory size to 13k Change-Id: I3f7a6170af93fdbaaa7bf2fffb4680a9f6113c13 Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
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Qixiang Xu authored
For Trusted Board Boot, BL1 RW section and BL2 need more space to support the ECDSA algorithm. Specifically, PLAT_ARM_MAX_BL1_RW_SIZE is increased on ARM platforms. And on the Juno platform: - BL2 size, PLAT_ARM_MAX_BL2_SIZE is increased. - SCP_BL2 is loaded into the space defined by BL31_BASE -> BL31_RW_BASE. In order to maintain the same size space for SCP_BL2,PLAT_ARM_MAX_BL31_SIZE is increased. Change-Id: I379083f918b40ab1c765da4e71780d89f0058040 Co-Authored-By: David Cunado <david.cunado@arm.com> Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
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- 21 Sep, 2017 1 commit
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Douglas Raillard authored
Use a mmap_region_t as parameter instead of getting a parameter for each structure member. This reduces the scope of changes when adding members to mmap_region_t. Also align on the convention of using mm_cursor as a variable name for the currently inspected region when iterating on the region array. Change-Id: If40bc4351b56c64b214e60dda27276d11ce9dbb3 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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- 19 Sep, 2017 2 commits
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davidcunado-arm authored
xlat: fix mm copy when adding a region
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davidcunado-arm authored
zynqmp: Sync function declaration and definition
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- 18 Sep, 2017 2 commits
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Soren Brinkmann authored
Synchronize argument order between function definition and declaration of pm_fpga_load. Fixes ARM-software/tf-issues#514 Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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davidcunado-arm authored
Implement log framework
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- 15 Sep, 2017 3 commits
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davidcunado-arm authored
xlat: Use MAP_REGION macro as compatibility layer
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davidcunado-arm authored
Hikey: enable CPU debug module
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davidcunado-arm authored
Helper macro to create MAIR encodings
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- 14 Sep, 2017 3 commits
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Douglas Raillard authored
mmap_add_region_ctx and mmap_add_dynamic_region_ctx are clearing members that they are not aware of by copying each member one by one. Replace this by structure assignment. Change-Id: I7c70cb408c8a8eb551402a5d8d956c1fb7f32b55 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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davidcunado-arm authored
hikey*: boot without spd
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davidcunado-arm authored
Set default value of USE_TBBR_DEFS
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- 13 Sep, 2017 4 commits
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Victor Chong authored
Otherwise, BL2 tries to load a BL32 image and triggers assert(result == 0) in plat_get_image_source() in hikey{960}_io_storage.c in a debug build, or displays ERROR: BL2: Failed to load image in a release build. Signed-off-by: Victor Chong <victor.chong@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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davidcunado-arm authored
Errata workarounds
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davidcunado-arm authored
plat/arm: Fix BL31_BASE when RESET_TO_BL31=1
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- 12 Sep, 2017 3 commits
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Qixiang Xu authored
The value of BL31_BASE currently depends on the size of BL31. This causes problems in the RESET_TO_BL31 case because the value of BL31_BASE is used in the model launch parameters, which often changes. Therefore, this patch fixes BL31_BASE to the middle of Trusted SRAM, to avoid further model parameter changes in future. Change-Id: I6d7fa4fe293717d84768974679539c0e0cb6d935 Signed-off-by: David Cunado <david.cunado@arm.com>
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davidcunado-arm authored
Filter out invalid configure for EL3_PAYLOAD_BASE
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davidcunado-arm authored
Introduce SDS Driver
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- 11 Sep, 2017 8 commits
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Isla Mitchell authored
This patch provides helper macros for both Device and Normal memory MAIR encodings as defined by the ARM Architecture Reference Manual for ARMv8-A (ARM DDI0487B.A). Change-Id: I5faae7f2cf366390ad4ba1d9253c6f3b60fd5e20 Signed-off-by: David Cunado <david.cunado@arm.com>
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davidcunado-arm authored
Reduce time lock in psci_do_cpu_off
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Soby Mathew authored
Using the OIDs defined in tbbr_oids.h is the recommended way to build the cert_create tool. This patch hence sets default value of the build flag USE_TBBR_DEFS to 1 in the Makefile in `tools/cert_create` folder when cert_create is built from this folder. Fixes ARM-software/tf-issues#482 Change-Id: Id1d224826b3417770bccbefa1b68d9bdb3b567f0 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Douglas Raillard authored
Use the MAP_REGION to build the mmap_region_t argument in wrappers like mmap_add_region(). Evolution of the mmap_region_t might require adding new members with a non-zero default value. Users of MAP_REGION are protected against such evolution. This commit also protects users of mmap_add_region() and mmap_add_dynamic_region() functions against these evolutions. Also make the MAP_REGION macro implementation more explicit and make it a mmap_region_t compound literal to make it useable as a function parameter on its own and to prevent using it in initialization of variables of different type. Change-Id: I7bfc4689f6dd4dd23c895b65f628d8ee991fc161 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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Soby Mathew authored
This patch gives users control over logging messages printed from the C code using the LOG macros defined in debug.h Users now have the ability to reduce the log_level at run time using the tf_log_set_max_level() function. The default prefix string can be defined by platform by overriding the `plat_log_get_prefix()` platform API which is also introduced in this patch. The new log framework results in saving of some RO data. For example, when BL1 is built for FVP with LOG_LEVEL=LOG_LEVEL_VERBOSE, resulted in saving 384 bytes of RO data and increase of 8 bytes of RW data. The framework also adds about 108 bytes of code to the release build of FVP. Fixes ARM-software/tf-issues#462 Change-Id: I476013d9c3deedfdd4c8b0b0f125665ba6250554 Co-authored-by: Eleanor Bonnici <Eleanor.bonnici@arm.com> Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch introduces tf_vprintf() and tf_string_print() APIs which is needed by the logging framework introduced in a later patch. Change-Id: Ie4240443d0e04e070502b51e371e546dd469fd33 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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davidcunado-arm authored
Set NS version SCTLR during warmboot path
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davidcunado-arm authored
juno: Fix bug in plat_get_my_entrypoint
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- 08 Sep, 2017 1 commit
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Qixiang Xu authored
TRUSTED_BOARD_BOOT and GENERATE_COT is not compatible with EL3_PAYLOAD_BASE Change-Id: I538c77e1f6c7da400d30ae4d633b8fcc55742202 Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
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- 07 Sep, 2017 6 commits
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Eleanor Bonnici authored
Earlier patches added errata workarounds 859972 for Cortex-A72, and 859972 for Cortex-A57 CPUs. Explicitly disable the workaround for Juno. Also reorganize errata workaround flags. No functional changes. Change-Id: I3fe3745de57d77e5bf52012826d3969fe5d4844e Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Eleanor Bonnici authored
Erratum 855971 applies to revision r0p3 or earlier Cortex-A72 CPUs. The recommended workaround is to disable instruction prefetch. Change-Id: I7fde74ee2a8a23b2a8a1891b260f0eb909fad4bf Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Eleanor Bonnici authored
Erratum 855972 applies to revision r1p3 or earlier Cortex-A57 CPUs. The recommended workaround is to disable instruction prefetch. Change-Id: I56eeac0b753eb1432bd940083372ad6f7e93b16a Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Leo Yan authored
Every CPU has its own debug module and this module is used by JTAG debugging and coresight tracing. If without enabling it, it's easily to introduce lockup issue when we enable debugging features. This patch is to enable CPU debug module when power on CPU; this allows connecting to all cores through JTAG and used by kernel coresight driver. Signed-off-by: Matthias Welwarsky <maw@sysgo.com> Signed-off-by: Leo Yan <leo.yan@linaro.org>
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davidcunado-arm authored
hikey*: Add LOAD_IMAGE_V2 and OP-TEE header parsing support
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davidcunado-arm authored
Support legacy RSA PKCS#1 v1.5 in cert create
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- 06 Sep, 2017 5 commits
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davidcunado-arm authored
Add CFI debug info to vector entries
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davidcunado-arm authored
CPU_DATA_LOG2SIZE depends on cache line size
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Soby Mathew authored
This patch does the required changes to enable CSS platforms to build and use the SDS framework. Since SDS is always coupled with SCMI protocol, the preexisting SCMI build flag is now renamed to `CSS_USE_SCMI_SDS_DRIVER` which will enable both SCMI and SDS on CSS platforms. Also some of the workarounds applied for SCMI are now removed with SDS in place. Change-Id: I94e8b93f05e3fe95e475c5501c25bec052588a9c Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch introduces the driver for Shared-Data-Structure (SDS) framework which will be used for communication between SCP and AP CPU. The SDS framework is intended to replace the Boot-Over-MHU (BOM) protocol used currently for the communication Change-Id: Ic174291121f4e581b174cce3389d22d6435f7269 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch factors out common files required for sp_min for all CSS platforms from the JUNO specific makefile to a the new `css_sp_min.mk` makefile. This also allows the common build options that affect CSS platforms to be configured in a central makefile for sp_min. Change-Id: Ida952d8833b1aa5eda77ae0a6664a4632aeab24c Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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