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Adds bl2 with FIP to the build required for mbed Linux booting where
we do:

BootROM -> SPL -> BL2 -> OPTEE -> u-boot

If NEED_BL2 is specified then BL2 will be built and BL31 will have
its address range modified upwards to accommodate. BL31 must be
loaded from a FIP in this case.

If NEED_BL2 is not specified then the current BL31 boot flow is
unaffected and u-boot SPL will load and execute BL31 directly.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Change-Id: I655343b3b689b1fc57cfbedda4d3dc2fbd549a96

Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor
could use SDEI to do hypervisor management, after physical IRQ
has been disabled routing.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I5fd697fee22df151e13d0f1335e8ac8a7bae6189

This patch moves all GICv3 driver files into new added
'gicv3.mk' makefile for the benefit of the generic driver
which can evolve in the future without affecting platforms.
The patch adds GICv3 driver configuration flags
'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and
'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in
'GICv3 driver options' section of 'build-option.rst'
document.

NOTE: Platforms with GICv3 driver need to be modified to
include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles.

Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

This patch provides separation of GICD, GICR accessor
functions and adds new macros for GICv3 registers access
as a preparation for GICv3.1 and GICv4 support.
NOTE: Platforms need to modify to include both
'gicdv3_helpers.c' and 'gicrv3_helpers.c' instead of the
single helper file previously.

Change-Id: I1641bd6d217d6eb7d1228be3c4177b2d556da60a
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

Some boards (f.e. Verdin i.MX8M Mini) use different UART base address
for serial debug output, so make this value configurable (as a
build option).
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Change-Id: I988492ccecbc3f64a5153b381c4a97b8a0181f52

Add the basic support for opteed SPD on imx8mq & imx8mm.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6c4855c89dea78d13d172c3d86cf047f829e51ce

Add the basic support for RDC init/config driver,
this module driver can be enhanced more if necessary.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I290dc378d0d85671435f9de46d5aa790b4e006c8

CAAM module must be initialized in secure world
before it can be used in non-secure world.

Change-Id: I042893667ddef99d8b6fc3902847d516d8591996
Signed-off-by: Jacky Bai <ping.bai@nxp.com>

The new API becomes the default one.

Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

AIPSTZ provide access control for all the peripherals connected
to it. In this patch all the perperals are configured accessible
to all the master. it can be customized based the actual use
case.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I5ef5baa1da6906f13a60923d27ede336c61e319a

The IMX_SIP_BUILDINFO call was implemented for imx8qm and imx8qx but
it's also applicable to imx8m.

This fixes U-Boot not printing commit hash on 8m with upstream TF-A.

Change-Id: Idcfd9729eaaccf329c24e241da325f1f6cd3c880
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>

The 'drivers/console/aarch64/console.S' is not needed,
so remove it from build to fix the build error when
'ERROR_DEPRECATED'set.

Change-Id: Id047a355f82fd33298b7e2b49eff289d28eb5b56
Signed-off-by: Jacky Bai <ping.bai@nxp.com>

The i.MX8M Mini is new SOC of the i.MX8M family. it is
focused on delivering the latest and greatest video and
audio experience combining state-of-the-art media-specific
features with high-performance processing while optimized
for lowest power consumption. The i.MX 8M Mini Media Applications
Processor is  14nm FinFET product of the growing i.MX8M family
targeting the consumer & industrial market. It is built in 14LPP
to achieve both high performance and low power consumption
and relies on a powerful fully coherent core complex based on
a quad Cortex-A53 cluster with video and graphics accelerators

this patch add the basic support for i.MX8MM.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>

for the i.MX8M SOCs, part of the code for gpc
and PSCI implementation can be reused and make it
common for all these SoCs. this patch extracts
the common part for reuse.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>

NXP's i.MX8MQ uses Cortex-A53 r0p4, enable necessary
erratas for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

i.MX8MQ is new SOC of NXP's i.MX8M family based on
A53. It can provide industry-leading audio, voice
and video processing for applications that scale
from consumer home audio to industrial building
automation and mobile computers

this patchset add the basic supoort to boot up
the 4 X A53. more feature will be added later.
Signed-off-by: Bai Ping <ping.bai@nxp.com>