- 01 Aug, 2019 2 commits
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Julius Werner authored
NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__. All common C compilers pre-define the same macros to signal which architecture the code is being compiled for: __arm__ for AArch32 (or earlier versions) and __aarch64__ for AArch64. There's no need for TF-A to define its own custom macros for this. In order to unify code with the export headers (which use __aarch64__ to avoid another dependency), let's deprecate the AARCH32 and AARCH64 macros and switch the code base over to the pre-defined standard macro. (Since it is somewhat unintuitive that __arm__ only means AArch32, let's standardize on only using __aarch64__.) Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200 Signed-off-by: Julius Werner <jwerner@chromium.org>
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Julius Werner authored
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__. All common C compilers predefine a macro called __ASSEMBLER__ when preprocessing a .S file. There is no reason for TF-A to define it's own __ASSEMBLY__ macro for this purpose instead. To unify code with the export headers (which use __ASSEMBLER__ to avoid one extra dependency), let's deprecate __ASSEMBLY__ and switch the code base over to the predefined standard. Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 24 Jul, 2019 3 commits
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Julius Werner authored
The Rockchip platform is a prime candidate for switching to the new bl31_params_parse_helper(), so switch it over. This will allow BL2 implementations on this platform to transparently switch over to the version 2 parameter structure. Change-Id: I540741d2425c93f66c8697ce749a351eb2b3a7e8 Signed-off-by: Julius Werner <jwerner@chromium.org>
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Julius Werner authored
This patch adds a new include/export/ directory meant for inclusion in third-party code. This is useful for cases where third-party code needs to interact with TF-A interfaces and data structures (such as a custom BL2-implementation like coreboot handing off to BL31). Directly including headers from the TF-A repository avoids having to duplicate all these definitions (and risk them going stale), but with the current header structure this is not possible because handoff API definitions are too deeply intertwined with other TF code/headers and chain-include other headers that will not be available in the other environment. The new approach aims to solve this by separating only the parts that are really needed into these special headers that are self-contained and will not chain-include other (non-export) headers. TF-A code should never include them directly but should instead always include the respective wrapper header, which will include the required prerequisites (like <stdint.h>) before including the export header. Third-party code can include the export headers via its own wrappers that make sure the necessary definitions are available in whatever way that environment can provide them. Change-Id: Ifd769320ba51371439a8e5dd5b79c2516c3b43ab Signed-off-by: Julius Werner <jwerner@chromium.org>
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Julius Werner authored
This patch changes all Rockchip platforms to use the new common BL aux parameter helpers. Since the parameter space is now cleanly split in generic and vendor-specific parameters and the COREBOOT_TABLE parameter is now generic, the parameter type number for that parameter has to change. Since it only affects coreboot which always builds TF as a submodule and includes its headers directly to get these constants, this should not cause any issues. In general, after this point, we should avoid changing already assigned parameter type numbers whenever possible. Change-Id: Ic99ddd1e91ff5e5fe212fa30c793a0b8394c9dad Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 01 May, 2019 1 commit
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Christoph Müllner authored
Currently the compile-time constant PLAT_RK_UART_BASE defines which UART is used as console device. E.g. on RK3399 it is set to UART2. That means, that a single bl31 image can not be used for two boards, which just differ on the UART console. This patch addresses this limitation by parsing the "stdout-path" property from the "chosen" node in the DTB. The expected property string is expected to have the form "serialN:XXX", with N being either 0, 1, 2, 3 or 4. When the property is found, it will be used to override PLAT_RK_UART_BASE. Tested on RK3399-Q7, with a stdout-path of "serial0:115200n8". Signed-off-by: Christoph Müllner <christophm30@gmail.com> Change-Id: Iafe1320e77ab006c121f8d52745d54cef68a48c7
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- 25 Apr, 2019 1 commit
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Heiko Stuebner authored
There are a number or ARMv7 Rockchip SoCs that are very similar in their bringup routines to the existing arm64 SoCs, so there is quite a high commonality possible here. Things like virtualization also need psci and hyp-mode and instead of trying to cram this into bootloaders like u-boot, barebox or coreboot (all used in the field), re-use the existing infrastructure in TF-A for this (both Rockchip plat support and armv7 support in general). So add core support for aarch32 Rockchip SoCs, with actual soc support following in a separate patch. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: I298453985b5d8434934fc0c742fda719e994ba0b
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 28 Sep, 2018 1 commit
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Antonio Nino Diaz authored
- Migrate to new GIC interfaces. - Migrate to bl31_early_platform_setup2(). - Use bl31_warm_entrypoint() instead of psci_entrypoint(). - Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE. - Update Makefile paths. - Remove references to removed build options. - Use private definition of bl31_params_t. Change-Id: I860341594b5c868b2fcaa59d23957ee718472ef1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 19 Jan, 2018 2 commits
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Julius Werner authored
This patch changes all Rockchip platforms to use the new MULTI_CONSOLE_API. The platform-specific plat_crash_console implementations are removed so that the platform can use the ones from the common platform code instead. Also change the registers used in plat_crash_print_regs. The existing use of x16 and x17 has always been illegal, since those registers are reserved for use by the linker as a temporary scratch registers in intra-procedure-call veneers and can never be expected to maintain their values across a function call. Change-Id: I8249424150be8d5543ed4af93b56756795a5288f Signed-off-by: Julius Werner <jwerner@chromium.org>
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Julius Werner authored
This patch changes all Rockchip platforms to initialize the serial console with information supplied by coreboot rather than hardcoded base address and divisor values if BL31 is run on top of coreboot. Moving the BL2-to-BL31 parameter parsing as early as possible to ensure that the console is available for all following code. Also update the Rockchip platform to use MULTI_CONSOLE_API. Change-Id: I670d350fa2f8b8133539f91ac14977ab47db60d9 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 29 Aug, 2017 1 commit
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Lin Huang authored
pd_alive control cru, grf, timer, gpio and wdt, when turn off logic power rail, these register value will back to reset value, we need to save them value in suspend and restore them when resuem, since timer will reinitial in kernel, so it not need to save/restore. Change-Id: I0fc2a011d3cdc04b66ffbf728e769eb28b51ee38 Signed-off-by: Lin Huang <hl@rock-chips.com>
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- 14 Jul, 2017 1 commit
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Isla Mitchell authored
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions to this change in order to retain header groupings and where there are headers within #if statements. Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
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- 08 Jun, 2017 2 commits
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Lin Huang authored
with PMU_PERILP_PD_EN bit enable, the soc will shutdown cm0, crypto, dcf, imem(normal SRAM), dmac, bootrom, efuse_con, spi, i2c, uart, saradc, tsadc when suspend, we have M0 code need to run when suspend in normal SRAM, so we need to take care of that. Change-Id: I8c066637e5b81d4b1d53197450b9d592cbe00793 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Derek Basehore <dbasehore@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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Lin Huang authored
the function pmu_cpuon_entrypoint() need to run in the pmusram, we just copy bin file to pmusram before, now we add pmusram section and link pmu_cpuon_entrypoint() to pmusram directly Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 01 Mar, 2017 1 commit
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tony.xie authored
Remove struct rockchip_pm_ops_cb and instead of using weak functions implement; in this way we want the codes look clear and simple; Change-Id: Ib9e8a5e932fdfc2b3e6a1ec502c40dfe720ac400 Signed-off-by: tony.xie <tony.xie@rock-chips.com>
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- 24 Feb, 2017 1 commit
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Xing Zheng authored
We used dcf do ddr frequency scaling, but we just include a dcf binary, it hard to maintain later, we have M0 compile flow in ATF, and M0 can also work for ddr frequency scaling, so let's use it. Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
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- 12 Jan, 2017 1 commit
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Masahiro Yamada authored
We are duplicating this macro define, and it is useful enough to be placed in the common place. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 14 Dec, 2016 1 commit
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Antonio Nino Diaz authored
Some files have incorrect copyright notices, this patch fixes all files with deviations from the standard notice. Change-Id: I66b73e78a50a235acb55f1e2ec2052a42c0570d2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 24 Oct, 2016 1 commit
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Caesar Wang authored
Add the common extra.ld.S and customized rk3399.ld.S to extend to more features for different platforms. For example, we can add SRAM section and specific address to load there if we need it, and the common bl31.ld.S not need to be modified. Therefore, we can remove the unused codes which copying explicitly from the function pmusram_prepare(). It looks like more clear. Change-Id: Ibffa2da5e8e3d1d2fca80085ebb296ceb967fce8 Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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- 09 Sep, 2016 2 commits
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Caesar Wang authored
For save power cosumption, if gpio power supply shut down, we need to set gpio2 ~ gpio4 to input and HiZ status when suspend, and recovery they status when rusume. we do it base on apio pass from loader. Change-Id: I59fd2395e5e37e63425472a39f519822c9197e4c
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Caesar Wang authored
some specific board need to disable/enable specific gpio when suspend/resume, so we add this function, bootloader can pass the specific gpio, and we can handle these gpios in bl31 suspend/resuem function. Change-Id: I373b03ef9202ee4a05a2b9caacdfa01b47ee2177
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- 25 Aug, 2016 1 commit
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Caesar Wang authored
For the PMU design, we don't expect to get the interrupts before enter the power mode. Since that will cause the confusion for the state machine in the power mode. Change-Id: Id8dee79ae617a66271b5caf92caf35f520f45099
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- 18 Jul, 2016 2 commits
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Tony Xie authored
1.Fixes the suspend/resume some bugs. 2.Add the power domain for saving power consumption. 3.Add cpu clusters suspend for rk3399 SoCs Change-Id: Id602779016b41d6281f4ba40a20229d909b28e46
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Caesar Wang authored
Software executing in the normal world and in the trusted world at exception levels lower than EL3 will request runtime services using the SMC instruction. See the documentation here: https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/ rt-svc-writers-guide.md This to be implemented as an EL3 Runtime Service in rockchip BL31 platform port, using the "SiP Service Call" range as specified in the SMC Calling Convention. This doesn't support any SMC yet, we will support it in later. Change-Id: I0a638dd0b653c28b08f79d89f77ed7c69864017d
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- 27 May, 2016 2 commits
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Caesar Wang authored
We add plat parameter structs to support BL2 to pass variable-length, variable-type parameters to BL31. The parameters are structured as a link list. During bl31 setup time, we travse the list to process each parameter. throuth this way, we can get the reset or power off gpio parameter, and do hardware control in BL31. This structure also can pass other parameter to BL31 in future.
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Caesar Wang authored
There are 5 groups of GPIO (GPIO0~GPIO4), totally have 122 GPIOs on rk3399 platform. The pull direction(pullup or pulldown) for all of GPIOs are software-programmable. At the moment, we add the gpio basic driver since reset or power off the devices from gpio configuration for BL31.
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- 04 May, 2016 1 commit
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Caesar Wang authored
This patch adds to support the suspend/resume for rk3399 SoCs. Signed-off-by: Shengfei xu <xsf@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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- 14 Apr, 2016 1 commit
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Gerald Lejeune authored
It is up to the platform to implement the new plat_crash_print_regs macro to report all relevant platform registers helpful for troubleshooting. plat_crash_print_regs merges or calls previously defined plat_print_gic_regs and plat_print_interconnect_regs macros for each existing platforms. NOTE: THIS COMMIT REQUIRES ALL PLATFORMS THAT ENABLE THE `CRASH_REPORTING` BUILD FLAG TO MIGRATE TO USE THE NEW `plat_crash_print_regs()` MACRO. BY DEFAULT, `CRASH_REPORTING` IS ENABLED IN DEBUG BUILDS FOR ALL PLATFORMS. Fixes: arm-software/tf-issues#373 Signed-off-by: Gerald Lejeune <gerald.lejeune@st.com>
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- 05 Apr, 2016 1 commit
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Tony Xie authored
This patch adds to support the RK3368 and RK3399 SoCs. RK3368/RK3399 is one of the Rockchip family SoCs, which is an multi-cores ARM SoCs. This patch adds support to boot the Trusted Firmware on RK3368/RK3399 SoCs, and adds support to boot secondary CPUs, enter/exit core power states for all CPUs in the slow/fast clusters. This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs) * Support arm gicv2 & gicv3. * Boot up multi-cores CPU. * Add generic CPU helper functions. * Support suspend/resume. * Add system_off & system_reset implementation. * Add delay timer platform implementation. * Support the new porting interface for the PSCI implementation. Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43 Signed-off-by: Tony Xie <tony.xie@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Shengfei xu <xsf@rock-chips.com>
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