GitLab

drivers: imx: mxc_usdhc: Do not set MMC_RSP_48 for MMC_RESPONSE_R2

PSCI cache flush and comment fixup

psci: platform control of SYSTEM_SUSPEND entry

Various corrections of typos

plat/arm: Move norflash driver to drivers/ folder

Some platforms can only resume from system suspend from the boot
CPU, hence they should only enter that state from that same core.

The following commit presents an interface that allows the platform to
reject system suspend entry near its very last stage (last CPU).

plat/arm: allow RESET_TO_BL31 for CSS-based platforms

When a platform enables its caches before it accesses the
psci_non_cpu_pd_nodes structure then explicit cache maintenance
is not needed.
Signed-off-by: Andrew F. Davis <afd@ti.com>

The MMU is not disabled in this path, update the comment to
reflect this. Also clarify that both paths call prepare_cpu_pwr_dwn(),
but the second path does stack cache maintenance.
Signed-off-by: Andrew F. Davis <afd@ti.com>

Fix service CPU image load at BL2 stage and update maintainers list

tools: Make invocation of host compiler correct

plat/arm/css/sgm: Reorder early platform init

doimage: get rid of non null terminated strings by strncpy

commit 97d5db8c reverts an update to the
MMC layer that accompanied the original submission of this MMC driver this
is the right-thing-to-do in terms of the MMC spec.

Unfortunately the reversion also breaks this driver. The issue is the i.MX
controller doesn't want MMC_RSP_48 set for MMC_RESPONSE_R2.

The appropriate place to place that constraint is obviously in
drivers/imx/usdhc/imx_usdhc.c not in the shared MMC codebase. This patch
restores the logic the i.MX controller requires without breaking it for
everyone else.

Fixes: 97d5db8c
Fixes: 2a82a9c9

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Jun Nie <jun.nie@linaro.org>

Change-Id: Icc6fb03abb9b4ef85931b9e3d767b5a9c271b5f3
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

Change-Id: I1ce771a155e6e83885a00d2f05591bf98cd69854
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

The "Secure" prefix (S-ELx) is valid only for S-EL0 and S-EL1 but is
meaningless for EL3, since EL3 is always secure. Hence, the "S" prefix
has been removed from wherever it was used as "S-EL3".

Change-Id: Icdeac9506d763f9f83d7297c7113aec7b85e9dbe
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

The definitions of the logging macros are reordered to be consistent
with the definitions of the log levels.

Change-Id: I6ff07b93eb64786ff147d39014d1c8e15db28444
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

In the function, bl1_early_platform_setup in the file
plat/arm/css/sgm/sgm_bl1_setup.c:

  plat_config_init();

  arm_bl1_early_platform_setup();

The debug messages logged by plat_config_init() are lost because
the console is initialized in the function
arm_bl1_early_platform_setup()

To see the logs of plat_config_init, this fix re-orders above calls
so that the console is initialized before call to plat_config_init.

Change-Id: I2e98f1f67c591cca24e28905acd0838ea3697a7c
Signed-off-by: Girish Pathak <girish.pathak@arm.com>

Fix misra warnings in SMC and power mgmt code

This way it can be reused by other platforms if needed.

Note that this driver is designed to work with the Versatile Express NOR
flash of Juno and FVP. In said platforms, the memory is organized as an
interleaved memory of two chips with a 16 bit word.

Any platform that wishes to reuse it with a different configuration will
need to modify the driver so that it is more generic.

Change-Id: Ic721758425864e0cf42b7b9b04bf0d9513b6022e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

This lets any future CSS platforms to use RESET_TO_BL31 flag.

Change-Id: I32a90fce43cb0c6f4d33589653a0fd6a7ecc9577
Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>

Change-Id: Ia00eba2b18804e6498d935d33ec104953e0e5e03
Signed-off-by: Sathees Balya <sathees.balya@arm.com>

xlat: Fix checks in mmap_add() and mmap_add_ctx()

Commit 79621f00

 broke sgi575.

It is possible to have a region with 0 as value for the attributes. It
means device memory, read only, secure, executable. This is legitimate
if the code is in flash and the code is executed from there.

This is the case for SGI_MAP_FLASH0_RO, defined in the file
plat/arm/css/sgi/sgi_plat.c.

This problem is solved by checking both size and attributes in xlat v1.
In xlat v2, it is enough to check the granularity, as it can never be 0.

Change-Id: I7be11f1b0e51c4c2ffd560b4a6cdfbf15de2c276
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Before switching to new API the scp_bl2 handler was invoked from
bl2/bl2_image_load.c which was removed. Invoke the platform specific
scp_bl2 handler in analogy to ARM and HiSilicon.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>

Declate Marvell's ownership on tools/doimage
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

Remove some MISRA defects in common code

Remove incorrect tabulation in Makefile

Enable Multi Console API in AArch32

No functional changes.

Change-Id: I9638e02acb9b22eb794ebf45aad84348a710287e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

MAKE_DTB: dependencies on device tree source files

HOSTCC should be used in any of the tools inside the tools/ directory
instead of CC. That way it is possible to override both values from the
command line when building the Trusted Firmware and the tools at the
same time. Also, use HOSTCCFLAGS instead of CFLAGS.

Also, instead of printing the strings CC and LD in the console during
the compilation of the tools, HOSTCC and HOSTLD have to be used for
clarity. This is how it is done in other projects like U-Boot or Linux.

Change-Id: Icd6f74c31eb74cdd1c353583399ab19e173e293e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/marvell: Move BLE into the platform tree, minor fix in tools.

 Reclaim BL31 initialization code memory for runtime data

maintainers: Correct github username for nariman to npoushin

Ensure the flow through switch statements is clear

When attempting to compile TF-A with "SPD=something ARCH=aarch32", the
following error message is printed:

 Makefile:291: *** recipe commences before first target.  Stop.

This is because the call to the error function is indented using a tab
whereas it's not part of a rule's recipe. Replace the tab by spaces.

Change-Id: Ic9b603837a0e43f2f7070cb39137541c332365d2
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

As these rules depend on non-existing headers as well (likely copy &
pasted from fiptool), they never matched, and the built-in rules were
used. That led to random breakages when e.g. CPPFLAGS was suddenly
evaluated and contained invalid options.

For the stm32image, this reveals that we were relying on the built-in
rules by passing -D_GNU_SOURCE via CPPFLAGS, rather than using CFLAGS as
used in the local rule. Fix that as well.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

The BLE is the pre-TF-A boot stage required by Marvell Armada
BootROM for bringing up DRAM and allow the boot image copy to it.
Since this is not a standard boot level and only uses the TF-A
as a build environment, it was introduced out of source tree.
However it turns out that such remote location introduces additional
complexity to the upstream TF-A build process.
In order to simplify the build environment the BLE source folder
is relocated from the external repository to A8K platform directory.
The build documentation is updated accordingly.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>