- 14 Jul, 2017 1 commit
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Isla Mitchell authored
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions to this change in order to retain header groupings and where there are headers within #if statements. Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 16 Nov, 2016 4 commits
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Soren Brinkmann authored
The callback IRQ is delivered to the NS OS. Provide an interface to allow the NS OS to obtain the callback data from the secure HW. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Soren Brinkmann authored
The IPI hardware is secure and managed by ATF, nevertheless we deliver the IRQ to the rich OS. The IRQ is needed to receive PM callbacks. Enable the IPI interrupt when the rich OS probes the API version. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Soren Brinkmann authored
Remove dead code pieces and stale comments. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Soren Brinkmann authored
Allow reading more than just a single value from the message buffer. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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- 24 May, 2016 1 commit
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Stefan Krsmanovic authored
DEFINE_BAKERY_LOCK() macro is used to put lock in coherent memory region. ARM Trusted Firmware design guide, chapter 11 states that bakery_lock data structures should be allocated in coherent memory region because it is accessed by multiple CPUs with mismatched shareability, cacheability and memory attributes. Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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- 18 Apr, 2016 1 commit
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Soren Brinkmann authored
The bit mapping in I(E|D|S)R are equal, consolidate the #defines. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
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- 06 Apr, 2016 1 commit
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Soren Brinkmann authored
The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This patch adds the platform port for that SoC. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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