1. 09 May, 2014 1 commit
    • Sandrine Bailleux's avatar
      Introduce IS_IN_ELX() macros · b3254e85
      Sandrine Bailleux authored
      The goal of these macros is to improve code readability by providing
      a concise way to check whether we are running in the expected
      exception level.
      
      Change-Id: If9aebadfb6299a5196e9a582b442f0971d9909b1
      b3254e85
  2. 08 May, 2014 11 commits
  3. 07 May, 2014 6 commits
    • Andrew Thoelke's avatar
      Optimise data cache clean/invalidate operation · 5f6032a8
      Andrew Thoelke authored
      The data cache clean and invalidate operations dcsw_op_all()
      and dcsw_op_loius() were implemented to invoke a DSB and ISB
      barrier for every set/way operation. This adds a substantial
      performance penalty to an already expensive operation.
      
      These functions have been reworked to provide an optimised
      implementation derived from the code in section D3.4 of the
      ARMv8 ARM. The helper macro setup_dcsw_op_args has been moved
      and reworked alongside the implementation.
      
      Fixes ARM-software/tf-issues#146
      
      Change-Id: Icd5df57816a83f0a842fce935320a369f7465c7f
      5f6032a8
    • Andrew Thoelke's avatar
      Remove unused or invalid asm helper functions · 228a9f0b
      Andrew Thoelke authored
      There are a small number of non-EL specific helper functions
      which are no longer used, and also some unusable helper
      functions for non-existant registers.
      
      This change removes all of these functions.
      
      Change-Id: Idd656cef3b59cf5c46fe2be4029d72288b649c24
      228a9f0b
    • Andrew Thoelke's avatar
      Access system registers directly in assembler · 7935d0a5
      Andrew Thoelke authored
      Instead of using the system register helper functions to read
      or write system registers, assembler coded functions should
      use MRS/MSR instructions. This results in faster and more
      compact code.
      
      This change replaces all usage of the helper functions with
      direct register accesses.
      
      Change-Id: I791d5f11f257010bb3e6a72c6c5ab8779f1982b3
      7935d0a5
    • Andrew Thoelke's avatar
      Replace disable_mmu with assembler version · 2f5dcfef
      Andrew Thoelke authored
      disable_mmu() cannot work as a C function as there is no control
      over data accesses generated by the compiler between disabling and
      cleaning the data cache. This results in reading stale data from
      main memory.
      
      As assembler version is provided for EL3, and a variant that also
      disables the instruction cache which is now used by the BL1
      exception handling function.
      
      Fixes ARM-software/tf-issues#147
      
      Change-Id: I0cf394d2579a125a23c2f2989c2e92ace6ddb1a6
      2f5dcfef
    • Andrew Thoelke's avatar
      Correct usage of data and instruction barriers · 8cec598b
      Andrew Thoelke authored
      The current code does not always use data and instruction
      barriers as required by the architecture and frequently uses
      barriers excessively due to their inclusion in all of the
      write_*() helper functions.
      
      Barriers should be used explicitly in assembler or C code
      when modifying processor state that requires the barriers in
      order to enable review of correctness of the code.
      
      This patch removes the barriers from the helper functions and
      introduces them as necessary elsewhere in the code.
      
      PORTING NOTE: check any port of Trusted Firmware for use of
      system register helper functions for reliance on the previous
      barrier behaviour and add explicit barriers as necessary.
      
      Fixes ARM-software/tf-issues#92
      
      Change-Id: Ie63e187404ff10e0bdcb39292dd9066cb84c53bf
      8cec598b
    • Andrew Thoelke's avatar
      Set processor endianness immediately after RESET · 40fd0725
      Andrew Thoelke authored
      SCTLR_EL3.EE is being configured too late in bl1_arch_setup() and
      bl31_arch_setup() after data accesses have already occured on
      the cold and warm boot paths.
      
      This control bit must be configured immediately on CPU reset to
      match the endian state of the firmware (little endian).
      
      Fixes ARM-software/tf-issues#145
      
      Change-Id: Ie12e46fbbed6baf024c30beb50751591bb8c8655
      40fd0725
  4. 06 May, 2014 13 commits
    • danh-arm's avatar
      Merge pull request #49 from danh-arm/dh/remove-non-const-data · e404d7f4
      danh-arm authored
      Remove variables from .data section
      e404d7f4
    • Dan Handley's avatar
      Remove variables from .data section · 625de1d4
      Dan Handley authored
      Update code base to remove variables from the .data section,
      mainly by using const static data where possible and adding
      the const specifier as required. Most changes are to the IO
      subsystem, including the framework APIs. The FVP power
      management code is also affected.
      
      Delay initialization of the global static variable,
      next_image_type in bl31_main.c, until it is realy needed.
      Doing this moves the variable from the .data to the .bss
      section.
      
      Also review the IO interface for inconsistencies, using
      uintptr_t where possible instead of void *. Remove the
      io_handle and io_dev_handle typedefs, which were
      unnecessary, replacing instances with uintptr_t.
      
      Fixes ARM-software/tf-issues#107.
      
      Change-Id: I085a62197c82410b566e4698e5590063563ed304
      625de1d4
    • danh-arm's avatar
      Merge pull request #48 from danh-arm/dh/major-refactoring · 408c3768
      danh-arm authored
      dh/major refactoring
      408c3768
    • Dan Handley's avatar
      Reduce deep nesting of header files · 97043ac9
      Dan Handley authored
      Reduce the number of header files included from other header
      files as much as possible without splitting the files. Use forward
      declarations where possible. This allows removal of some unnecessary
      "#ifndef __ASSEMBLY__" statements.
      
      Also, review the .c and .S files for which header files really need
      including and reorder the #include statements alphabetically.
      
      Fixes ARM-software/tf-issues#31
      
      Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
      97043ac9
    • Dan Handley's avatar
      Always use named structs in header files · fb037bfb
      Dan Handley authored
      Add tag names to all unnamed structs in header files. This
      allows forward declaration of structs, which is necessary to
      reduce header file nesting (to be implemented in a subsequent
      commit).
      
      Also change the typedef names across the codebase to use the _t
      suffix to be more conformant with the Linux coding style. The
      coding style actually prefers us not to use typedefs at all but
      this is considered a step too far for Trusted Firmware.
      
      Also change the IO framework structs defintions to use typedef'd
      structs to be consistent with the rest of the codebase.
      
      Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
      fb037bfb
    • Dan Handley's avatar
      Move PSCI global functions out of private header · c5945735
      Dan Handley authored
      Move the PSCI global functions out of psci_private.h and into
      psci.h to allow the standard service to only depend on psci.h.
      
      Change-Id: I8306924a3814b46e70c1dcc12524c7aefe06eed1
      c5945735
    • Dan Handley's avatar
      Separate BL functions out of arch.h · 5b827a8f
      Dan Handley authored
      Move the BL function prototypes out of arch.h and into the
      appropriate header files to allow more efficient header file
      inclusion. Create new BL private header files where there is no
      sensible existing header file.
      
      Change-Id: I45f3e10b72b5d835254a6f25a5e47cf4cfb274c3
      5b827a8f
    • Dan Handley's avatar
      Refactor GIC header files · 8a4fb6f6
      Dan Handley authored
      Move the function prototypes from gic.h into either gic_v2.h or
      gic_v3.h as appropriate. Update the source files to include the
      correct headers.
      
      Change-Id: I368cfda175cdcbd3a68f46e2332738ec49048e19
      8a4fb6f6
    • Dan Handley's avatar
      Separate out CASSERT macro into own header · bdbfc3c2
      Dan Handley authored
      Separate out the CASSERT macro out of bl_common.h into its own
      header to allow more efficient header inclusion.
      
      Change-Id: I291be0b6b8f9879645e839a8f0dd1ec9b3db9639
      bdbfc3c2
    • Dan Handley's avatar
      Remove vpath usage in makefiles · bee82417
      Dan Handley authored
      Remove all usage of the vpath keyword in makefiles as it was prone
      to mistakes. Specify the relative paths to source files instead.
      
      Also reorder source files in makefiles alphabetically.
      
      Fixes ARM-software/tf-issues#121
      
      Change-Id: Id15f60655444bae60e0e2165259efac71a50928b
      bee82417
    • Dan Handley's avatar
      Make use of user/system includes more consistent · 35e98e55
      Dan Handley authored
      Make codebase consistent in its use of #include "" syntax for
      user includes and #include <> syntax for system includes.
      
      Fixes ARM-software/tf-issues#65
      
      Change-Id: If2f7c4885173b1fd05ac2cde5f1c8a07000c7a33
      35e98e55
    • Dan Handley's avatar
      Move FVP power driver to FVP platform · e8246c07
      Dan Handley authored
      Move the FVP power driver to a directory under the FVP platform
      port as this is not a generically usable driver.
      
      Change-Id: Ibc78bd88752eb3e3964336741488349ac345f4f0
      e8246c07
    • Dan Handley's avatar
      Move include and source files to logical locations · 4ecca339
      Dan Handley authored
      Move almost all system include files to a logical sub-directory
      under ./include. The only remaining system include directories
      not under ./include are specific to the platform. Move the
      corresponding source files to match the include directory
      structure.
      
      Also remove pm.h as it is no longer used.
      
      Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
      4ecca339
  5. 01 May, 2014 1 commit
  6. 29 Apr, 2014 1 commit
    • Vikram Kanigiri's avatar
      Preserve PSCI cpu_suspend 'power_state' parameter. · 759ec93b
      Vikram Kanigiri authored
      This patch saves the 'power_state' parameter prior to suspending
      a cpu and invalidates it upon its resumption. The 'affinity level'
      and 'state id' fields of this parameter can be read using a set of
      public and private apis. Validation of power state parameter is
      introduced which checks for SBZ bits are zero.
      This change also takes care of flushing the parameter from the cache
      to main memory. This ensures that it is available after cpu reset
      when the caches and mmu are turned off. The earlier support for
      saving only the 'affinity level' field of the 'power_state' parameter
      has also been reworked.
      
      Fixes ARM-Software/tf-issues#26
      Fixes ARM-Software/tf-issues#130
      
      Change-Id: Ic007ccb5e39bf01e0b67390565d3b4be33f5960a
      759ec93b
  7. 24 Apr, 2014 4 commits
    • danh-arm's avatar
      Merge pull request #33 from hliebel/hl/secure-memory · 429421de
      danh-arm authored
      Hl/secure memory
      429421de
    • Harry Liebel's avatar
      FVP secure memory support documentation · ce19cf1b
      Harry Liebel authored
      Fixes ARM-software/tf-issues#64
      
      Change-Id: I4e56c25f9dc7f486fbf6fa2f7d8253874119b989
      ce19cf1b
    • Harry Liebel's avatar
      Enable secure memory support for FVPs · f2199d95
      Harry Liebel authored
      - Use the TrustZone controller on Base FVP to program DRAM access
        permissions. By default no access to DRAM is allowed if
        'secure memory' is enabled on the Base FVP.
      - The Foundation FVP does not have a TrustZone controller but instead
        has fixed access permissions.
      - Update FDTs for Linux to use timers at the correct security level.
      - Starting the FVPs with 'secure memory' disabled is also supported.
      
      Limitations:
      Virtio currently uses a reserved NSAID. This will be corrected in
      future FVP releases.
      
      Change-Id: I0b6c003a7b5982267815f62bcf6eb82aa4c50a31
      f2199d95
    • Harry Liebel's avatar
      Add TrustZone (TZC-400) driver · cd116d17
      Harry Liebel authored
      The TZC-400 performs security checks on transactions to memory or
      peripherals. Separate regions can be created in the address space each
      with individual security settings.
      
      Limitations:
      This driver does not currently support raising an interrupt on access
      violation.
      
      Change-Id: Idf8ed64b4d8d218fc9b6f9d75acdb2cd441d2449
      cd116d17
  8. 22 Apr, 2014 2 commits
  9. 16 Apr, 2014 1 commit