- 29 Oct, 2018 5 commits
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Antonio Nino Diaz authored
No functional changes. Change-Id: I9b9f8d3dfde08d57706ad5450de6ff858a55ac01 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Deepak Pandey authored
This patch adds support for the N1SDP (NeoVerse N1 System Development Platform). It is an initial port and additional features are expected to be added later. The port includes only BL31 support as the System Control Processor (SCP) is expected to take the role of primary boatloader Change-Id: Ife17d8215a7bfcc1420204a72205e7ef920d0c10 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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Soby Mathew authored
This patch enabled PIE for FVP when RESET_TO_BL31=1. The references to BL31_BASE are replaced by BL31_START as being a symbol exported by the linker, will create a dynamic relocation entry in .rela.dyn and hence will be fixed up by dynamic linker at runtime. Also, we disable RECLAIM_INIT_CODE when PIE is enabled as the init section overlay creates some static relocations which cannot be handled by the dynamic linker currently. Change-Id: I86df1b0a8b2a8bbbe7c3f3c0b9a08c86c2963ec0 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch makes use of mov_imm macro where possible to load immediate values within ARM platform layer. Change-Id: I02bc7fbc1fa334c9fccf76fbddf515952f9a1298 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch adds a utility function to return the address of a symbol. By default, the compiler generates adr/adrp instruction pair to return the reference and this utility is used to override this compiler generated to code and use `ldr` instruction. This is needed for Position Independent Executable when it needs to reference a symbol which is constant and does not depend on the execute address of the binary. For example, on the FVP, the GICv3 register context is stored in a secure carveout (arm_el3_tzc_dram) within DDR and does not relocate with the BL image. Now if BL31 is executing at a different address other than the compiled address, using adrp/adr instructions to reference this memory will not work as they generate an address that is PC relative. The way to get around this problem is to reference it as non-PC relative (i.e non-relocatable location) via `ldr` instruction. Change-Id: I5008a951b007144258121690afb68dc8e12ee6f7 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 26 Oct, 2018 2 commits
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Roberto Vargas authored
This function is not related to Arm platforms and can be reused by other platforms if needed. Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platforms. This patch adds the definition XLAT_TABLES_LIB_V2 to the xlat tables lib v2 makefile. This way it is possible to detect from C code which version is being used and include the correct header. The file arm_xlat_tables.h has been renamed to xlat_tables_compat.h and moved to a common folder. This way, when in doubt, this header can be used to guarantee compatibility, as it includes the correct header based on XLAT_TABLES_LIB_V2. This patch also removes the usage of ARM_XLAT_TABLES_V1 from QEMU (so that is now locked in xlat lib v2) and ZynqMP (where it was added as a workaround). Change-Id: Ie1e22a23b44c549603d1402a237a70d0120d3e04 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 25 Oct, 2018 1 commit
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Antonio Nino Diaz authored
In Arm platforms the crash console doesn't print anything if the crash happens early enough. This happens in all images, not only BL1. The reason is that they the files ``plat/common/aarch64/platform_helpers.S`` and ``plat/arm/common/aarch64/arm_helpers.S``, and the crash console functions are defined as weak in both files. In practice, the linker can pick the one in ``plat/common``, which simply switches the multi console to crash mode when it wants to initialize the crash console. In the case of Arm platforms, there are no console drivers registered at that point, so nothing is printed. This patch makes the functions in plat/arm strong so that they override the weak functions in plat/common. Change-Id: Id358db7d2567d7df0951790a695636cf6c9ac57f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 23 Oct, 2018 2 commits
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Antonio Nino Diaz authored
Version 1.4.7 of libfdt is bigger than the current one (1.4.2) and the current reserved space for BL2 in Juno isn't enough to fit the Trusted Firmware when compiling with clang or armclang. Change-Id: I7b73394ca60d17f417773f56dd5b3d54495a45a8 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The definitions FAIL_CONTROL_*_SHIFT were incorrect, they have been fixed. The types tzc_region_attributes_t and tzc_action_t have been removed and replaced by unsigned int because it is not allowed to do logical operations on enums. Also, fix some address definitions in arm_def.h. Change-Id: Id37941d76883f9fe5045a5f0a4224c133c504d8b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 18 Oct, 2018 5 commits
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Chandni Cherukuri authored
The default values of 'plat_css_scmi_plat_info' is not applicable for all the platforms. There should be a provision to let platform code to register a platform specific instance of scmi_channel_plat_info_t. Add a new API 'plat_css_get_scmi_info' which lets the platform to register a platform specific instance of scmi_channel_plat_info_t and remove the default values. In addition to this, the existing 'plat_css_scmi_plat_info' structure is removed from the common code and instantiated for the platforms that need it. This allows for a consistent provisioning of the SCMI channel information across all the existing and upcoming platforms. Change-Id: I4fb65d7f2f165b78697b4677f1e8d81edebeac06 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
Dynamically populating the 'system-id' node in the HW_CONFIG dts makes it difficult to enforce memory overlap checks. So add the system-id node in the HW_CONFIG dts file as a place holder with 'platform-id' and 'config-id' set to zero. The code at BL2 stage determines the values of 'platform-id' and 'config-id' at runtime and updates the corresponding fields in the system-id node of HW_CONFIG dts. Change-Id: I2ca9980b994ac418da8afa0c72716ede10aff68a Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
To align the placement of ftds files with that of other Arm platforms, move the ftds files from plat/arm/css/sgi/ to plat/arm/board/sgi575. Change-Id: Id7c772eb5cf3d308d4e02a3c8099218e889a0e96 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
On SGI platforms, the interconnect is setup by the SCP and so the existing unused interconnect setup in sgi575 platform code can be removed. As a result of this, sgi_plat_config.c and sgi_bl1_setup.c files can be removed as these files are now empty or can be substainated by the existing weak functions. Change-Id: I3c883e4d1959d890bf2213a9be01f02551ea3a45 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
In preparation of adding support for upcoming SGI platforms, macros common to all the SGI platforms are moved into sgi_base_platform_def.h file. Macros that are specific to sgi575 platform remain in the platform_def.h file. In addition to this, the platform_def.h file is moved to sgi575 board directory. Also the ENT_CPU_SOURCES has been renamed to SGI_CPU_SOURCES and moved from sgi-common.mk to board specific makefile platform.mk Change-Id: Iccdd9f070f4feea232b9fbf4fdcc0ef2e8eccbf2 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 16 Oct, 2018 1 commit
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Roberto Vargas authored
When HW_ASSISTED_COHERENCY is enabled we can use spinlocks instead of using the more complex and slower bakery algorithm. Change-Id: I9d791a70050d599241169b9160a67e57d5506564 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 15 Oct, 2018 1 commit
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Deepak Pandey authored
macro jump_if_cpu_midr is used commonly by many arm platform. It has now been relocated to common place to remove duplication of code. Change-Id: Ic0876097dbc085df4f90eadb4b7687dde7c726da Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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- 11 Oct, 2018 3 commits
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Sathees Balya authored
Change-Id: Ica944acc474a099219d50b041cfaeabd4f3d362f Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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Antonio Nino Diaz authored
This file is shared between FVP and all CSS platforms. While it may be true that some definitions can be common, it doesn't make sense conceptually. For example, the stack size depends on the platform and so does the SRAM size. After removing them, there are not enough common definitions to justify having this header, so the other definitions have been moved to the platform_def.h of FVP, board_css_def.h and arm_def.h. Change-Id: Ifbf4b017227f9dfefa1a430f67d7d6baae6a4ba1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This file is only used by Juno as all other CSS platforms have their own private memory maps. Change-Id: I1c9f27aac7b1d8bff4d92674e8bde5505b93c8c4 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 10 Oct, 2018 4 commits
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John Tsichritzis authored
The "Secure" prefix (S-ELx) is valid only for S-EL0 and S-EL1 but is meaningless for EL3, since EL3 is always secure. Hence, the "S" prefix has been removed from wherever it was used as "S-EL3". Change-Id: Icdeac9506d763f9f83d7297c7113aec7b85e9dbe Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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Girish Pathak authored
In the function, bl1_early_platform_setup in the file plat/arm/css/sgm/sgm_bl1_setup.c: plat_config_init(); arm_bl1_early_platform_setup(); The debug messages logged by plat_config_init() are lost because the console is initialized in the function arm_bl1_early_platform_setup() To see the logs of plat_config_init, this fix re-orders above calls so that the console is initialized before call to plat_config_init. Change-Id: I2e98f1f67c591cca24e28905acd0838ea3697a7c Signed-off-by: Girish Pathak <girish.pathak@arm.com>
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Antonio Nino Diaz authored
This way it can be reused by other platforms if needed. Note that this driver is designed to work with the Versatile Express NOR flash of Juno and FVP. In said platforms, the memory is organized as an interleaved memory of two chips with a 16 bit word. Any platform that wishes to reuse it with a different configuration will need to modify the driver so that it is more generic. Change-Id: Ic721758425864e0cf42b7b9b04bf0d9513b6022e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Deepak Pandey authored
This lets any future CSS platforms to use RESET_TO_BL31 flag. Change-Id: I32a90fce43cb0c6f4d33589653a0fd6a7ecc9577 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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- 09 Oct, 2018 1 commit
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Sathees Balya authored
Change-Id: Ia00eba2b18804e6498d935d33ec104953e0e5e03 Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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- 03 Oct, 2018 4 commits
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Daniel Boulby authored
Map the initialization code for BL31 to overlap with the memory required for the secondary cores stack. Once BL31 has been initialized the memory can be remapped to RW data so that it can be used for secondary cores stacks. By moving code from .text to .text.init the size of the BL31 image is decreased by a page. Split arm_common.ld.S into two linker scripts, one for tzc_dram (arm_tzc_dram.ld.S) and one for reclaiming initialization code (arm_reclaim_init.ld.S) so that platforms can chose which memory regions they wish to include. Change-Id: I648e88f3eda1aa71765744cf34343ecda9320b32 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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Daniel Boulby authored
Mark the GICv3, CCI and CCN code only used in Bl31 initialization with __init to be reclaimed once no longer needed. Change-Id: I3d77f36758450d9d1d87ecc60bc1c63fe4082667 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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Daniel Boulby authored
Mark the initialization functions found in the BL31 boot sequence as __init so they can be reclaimed when no longer needed. Change-Id: I687a89346419c7710ef5097feaa325d83c527697 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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Daniel Boulby authored
Remove ARM_MAP_BL_ROMLIB memory region macro as it is now split into two regions for code and data Change-Id: Ic17b5b584933c196db29fe83051d7e0a8e92911c Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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- 02 Oct, 2018 1 commit
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Antonio Nino Diaz authored
This option makes it hard to optimize the memory definitions of all Arm platforms because any change in the common defines must work in all of them. The best thing to do is to remove it and move the definition to each platform's header. FVP, SGI and SGM were using the definitions in board_arm_def.h. The definitions have been copied to each platform's platform_def.h. Juno was already using the ones in platform_def.h, so there have been no changes. Change-Id: I9aecd11bbc72a3d0d7aad1ef9934d8df21dcfaf2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 28 Sep, 2018 3 commits
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Antonio Nino Diaz authored
- Remove references to removed build options. - Remove support for LOAD_IMAGE_V2=0. Change-Id: I296385ef2ebf829446c76a54400d73f963ed265f Tested-by: Nariman Poushin <nariman.poushin@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
- Remove references to removed build options. - Remove support for legacy GIC driver. - Remove support for LOAD_IMAGE_V2=0. Change-Id: I72f8c05620bdf4a682765e6e53e2c04ca749a3d5 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Dimitris Papastamos authored
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- 26 Sep, 2018 1 commit
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John Tsichritzis authored
Fixed a Coverity defect by adding a runtime check to avoid potential NULL pointer dereference. Change-Id: I9a0aa0efd27334131ac835b43348658b436c657d Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 24 Sep, 2018 1 commit
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Elieva Pignat authored
For sgm775 the SCP_BL2 build in debug mode is around 94KiB which is higher than the maximum size for SCP_BL2. This patch increase the maximum allowed size for SCP_BL2 to 96KiB. Change-Id: Ibca0daadba41429301c651ae21cbba87e45ccddf Signed-off-by: Elieva Pignat <Elieva.Pignat@arm.com>
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- 21 Sep, 2018 2 commits
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Daniel Boulby authored
Set MULTI_CONSOLE_API=1 for both AArch64 and AArch32 by default. MULTI_CONSOLE_API=0 is still supported, but it has to be set from the command line. Change-Id: I4eeaa8e243a3fe93ed8a716e502666a26ad28f35 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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Daniel Boulby authored
Allow AArch32 to use the multi console driver by adding the required functions Change-Id: I9e69f18965f320074cf75442d6b0de891aef7936 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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- 18 Sep, 2018 1 commit
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Soby Mathew authored
The patch d323af9e removed the support for coherent memory in BL1 and BL2 for ARM platforms. But the CryptoCell SBROM integration depends on use of coherent buffers for passing data from the AP CPU to the CryptoCell. Hence this patch reintroduces support for coherent memory in BL1 and BL2 if ARM_CRYPTOCELL_INTEG=1. Change-Id: I011482dda7f7a3ec9e3e79bfb3f4fa03796f7e02 Signed-Off-by: Soby Mathew <soby.mathew@arm.com>
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- 10 Sep, 2018 1 commit
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Soby Mathew authored
This patch fixes an array overrun in CSS scmi driver if the system power domain level is less than 2. This was reported from https://scan.coverity.com/projects/arm-software-arm-trusted-firmware CID 308492 Change-Id: I3a59c700490816718d20c71141281f19b2b7e7f7 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 07 Sep, 2018 1 commit
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Sathees Balya authored
The patch 7b56928a unified the FWU mechanism on FVP and Juno platforms due to issues with MCC firmware not preserving the NVFLAGS. With MCCv150 firmware, this issue is resolved. Also writing to the NOR flash while executing from the same flash in Bypass mode had some stability issues. Hence, since the MCC firmware issue is resolved, this patch reverts to the NVFLAGS mechanism to detect FWU. Also, with the introduction of SDS (Shared Data Structure) by the SCP, the reset syndrome needs to queried from the appropriate SDS field. Change-Id: If9c08f1afaaa4fcf197f3186887068103855f554 Signed-off-by: Sathees Balya <sathees.balya@arm.com> Signed-off-by: Soby Mathew <Soby.Mathew@arm.com>
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