1. 18 Oct, 2018 1 commit
    • Chandni Cherukuri's avatar
      plat/arm/scmi: introduce plat_css_get_scmi_info API · b911dddc
      Chandni Cherukuri authored
      
      
      The default values of 'plat_css_scmi_plat_info' is not applicable for
      all the platforms. There should be a provision to let platform code to
      register a platform specific instance of scmi_channel_plat_info_t.
      
      Add a new API 'plat_css_get_scmi_info' which lets the platform to
      register a platform specific instance of scmi_channel_plat_info_t and
      remove the default values.
      
      In addition to this, the existing 'plat_css_scmi_plat_info' structure
      is removed from the common code and instantiated for the platforms that
      need it. This allows for a consistent provisioning of the SCMI channel
      information across all the existing and upcoming platforms.
      
      Change-Id: I4fb65d7f2f165b78697b4677f1e8d81edebeac06
      Signed-off-by: default avatarChandni Cherukuri <chandni.cherukuri@arm.com>
      b911dddc
  2. 16 Oct, 2018 1 commit
  3. 15 Oct, 2018 1 commit
  4. 11 Oct, 2018 3 commits
  5. 10 Oct, 2018 4 commits
  6. 09 Oct, 2018 1 commit
  7. 03 Oct, 2018 4 commits
  8. 02 Oct, 2018 1 commit
    • Antonio Nino Diaz's avatar
      plat/arm: Remove option ARM_BOARD_OPTIMISE_MEM · c0740e4f
      Antonio Nino Diaz authored
      
      
      This option makes it hard to optimize the memory definitions of all Arm
      platforms because any change in the common defines must work in all of
      them. The best thing to do is to remove it and move the definition to
      each platform's header.
      
      FVP, SGI and SGM were using the definitions in board_arm_def.h. The
      definitions have been copied to each platform's platform_def.h. Juno
      was already using the ones in platform_def.h, so there have been no
      changes.
      
      Change-Id: I9aecd11bbc72a3d0d7aad1ef9934d8df21dcfaf2
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      c0740e4f
  9. 28 Sep, 2018 3 commits
  10. 26 Sep, 2018 1 commit
  11. 24 Sep, 2018 1 commit
  12. 21 Sep, 2018 2 commits
  13. 18 Sep, 2018 1 commit
  14. 10 Sep, 2018 1 commit
  15. 07 Sep, 2018 5 commits
    • Sathees Balya's avatar
      juno: Revert FWU update detect mechanism · 4da6f6cd
      Sathees Balya authored
      The patch 7b56928a
      
       unified the FWU mechanism on FVP and Juno
      platforms due to issues with MCC firmware not preserving the
      NVFLAGS. With MCCv150 firmware, this issue is resolved. Also
      writing to the NOR flash while executing from the same flash
      in Bypass mode had some stability issues. Hence, since the
      MCC firmware issue is resolved, this patch reverts to the
      NVFLAGS mechanism to detect FWU. Also, with the introduction
      of SDS (Shared Data Structure) by the SCP, the reset syndrome
      needs to queried from the appropriate SDS field.
      
      Change-Id: If9c08f1afaaa4fcf197f3186887068103855f554
      Signed-off-by: default avatarSathees Balya <sathees.balya@arm.com>
      Signed-off-by: default avatarSoby Mathew <Soby.Mathew@arm.com>
      4da6f6cd
    • Alexei Fedorov's avatar
      ARM Platforms:Enable non-secure access to UART1 · 2431d00f
      Alexei Fedorov authored
      
      
      Adds an undocumented build option that enables non-secure access to
      the PL011 UART1.
      This allows a custom build where the UART can be used as a serial debug
      port for WinDbg (or other debugger) connection.
      
      This option is not documented in the user guide, as it is provided as a
      convenience for Windows debugging, and not intended for general use.
      In particular, enabling non-secure access to the UART might allow
      a denial of service attack!
      
      Change-Id: I4cd7d59c2cac897cc654ab5e1188ff031114ed3c
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      Signed-off-by: default avatarEvan Lloyd <evan.lloyd@arm.com>
      2431d00f
    • John Tsichritzis's avatar
      Add cache flush after BL1 writes heap info to DTB · 63cc2658
      John Tsichritzis authored
      
      
      A cache flush is added in BL1, in Mbed TLS shared heap code. Thus, we
      ensure that the heap info written to the DTB always gets written back to
      memory.  Hence, sharing this info with other images is guaranteed.
      
      Change-Id: I0faada31fe7a83854cd5e2cf277ba519e3f050d5
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      63cc2658
    • John Tsichritzis's avatar
      Additional runtime check for DTB presence in BL2 · a606031e
      John Tsichritzis authored
      
      
      In Mbed TLS shared heap code, an additional sanity check is introduced
      in BL2. Currently, when BL2 shares heap with BL1, it expects the heap
      info to be found in the DTB. If for any reason the DTB is missing, BL2
      cannot have the heap address and, hence, Mbed TLS cannot proceed. So,
      BL2 cannot continue executing and it will eventually crash.  With this
      change we ensure that if the DTB is missing BL2 will panic() instead of
      having an unpredictable crash.
      
      Change-Id: I3045ae43e54b7fe53f23e7c2d4d00e3477b6a446
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      a606031e
    • John Tsichritzis's avatar
      Slight improvements in Mbed TLS shared heap helpers · 7af2dd2e
      John Tsichritzis authored
      
      
      This patch, firstly, makes the error messages consistent to how printed
      strings are usually formatted. Secondly, it removes an unnecessary #if
      directive.
      
      Change-Id: Idbb8ef0070562634766b683ac65f8160c9d109e6
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      7af2dd2e
  16. 04 Sep, 2018 3 commits
  17. 30 Aug, 2018 2 commits
  18. 23 Aug, 2018 1 commit
  19. 22 Aug, 2018 1 commit
  20. 21 Aug, 2018 1 commit
  21. 20 Aug, 2018 1 commit
  22. 10 Aug, 2018 1 commit