1. 28 Apr, 2015 2 commits
    • Dan Handley's avatar
      Allow deeper platform port directory structure · c04d2606
      Dan Handley authored
      Update the top level makefile to allow platform ports to exist in
      subdirectories at any level instead of one level under `plat/`. The
      makefile recursively searches for all files called `platform.mk` in
      all subdirectories of `plat/`. The directory containing
      `platform.mk` is the platform name. Platform names must be unique
      across the codebase.
      
      Replace usage of HELP_PLATFORMS in the Makefile with PLATFORMS since
      these are both used to report the same information back to the user.
      
      Update the TSP and cert_create tool makefiles in a similar way
      to support a deeper platform port directory structure.
      
      Also add PLAT_<plat_name> as a define passed through the top level
      makefile to the source files, to allow build time variation in common
      platform code.
      
      Change-Id: I213420164808c5ddb99a26144e8e3f141a7417b7
      c04d2606
    • Dan Handley's avatar
      Separate out common console functionality · d3b638cb
      Dan Handley authored
      Separate out the common console functionality in
      `drivers/arm/pl011/pl011_console.S` into a new source file
      `drivers/console/console.S`. The former includes the latter to
      provide backwards compatibility for platform make files.
      
      Also add a skeleton console implementation for platforms that do not
      want to use PL011.
      
      Change-Id: I1ff963b2b54a872fbcf1eb0700797b9e9afa2538
      d3b638cb
  2. 27 Apr, 2015 4 commits
    • Dan Handley's avatar
      Add header guards to asm macro files · e2bf57f8
      Dan Handley authored
      Some assembly files containing macros are included like header files
      into other assembly files. This will cause assembler errors if they
      are included multiple times.
      
      Add header guards to assembly macro files to avoid assembler errors.
      
      Change-Id: Ia632e767ed7df7bf507b294982b8d730a6f8fe69
      e2bf57f8
    • Dan Handley's avatar
      Remove use of PLATFORM_CACHE_LINE_SIZE · ce4c820d
      Dan Handley authored
      The required platform constant PLATFORM_CACHE_LINE_SIZE is
      unnecessary since CACHE_WRITEBACK_GRANULE effectively provides the
      same information. CACHE_WRITEBACK_GRANULE is preferred since this
      is an architecturally defined term and allows comparison with the
      corresponding hardware register value.
      
      Replace all usage of PLATFORM_CACHE_LINE_SIZE with
      CACHE_WRITEBACK_GRANULE.
      
      Also, add a runtime assert in BL1 to check that the provided
      CACHE_WRITEBACK_GRANULE matches the value provided in CTR_EL0.
      
      Change-Id: If87286be78068424217b9f3689be358356500dcd
      ce4c820d
    • Dan Handley's avatar
      Fix type mismatches in verbose logging · 1b70db06
      Dan Handley authored
      Commit dad25049 adds support for type checking in printf-like
      functions. Some of the VERBOSE logging statements were not updated
      at that time.
      
      Fix the type mismatches in the verbose logging statements.
      
      Change-Id: Idd9a49e41cc0dc31f7698e220819d934e3d2d10e
      1b70db06
    • Dan Handley's avatar
      Add TZC function to configure region 0 · 71a84445
      Dan Handley authored
      Region 0 is special in TZC-400. It is possible to set the access
      permissions for this but not the address range or filters to which
      the permissions apply. Add a function for setting the region 0
      access permissions.
      
      Also add some VERBOSE logging and allow assembly files to include
      the TZC header.
      
      Change-Id: I4389261ba10a6e5e2e43ee93d55318dc507b6648
      71a84445
  3. 13 Apr, 2015 6 commits
  4. 09 Apr, 2015 1 commit
  5. 08 Apr, 2015 1 commit
    • Kévin Petit's avatar
      Add support to indicate size and end of assembly functions · 8b779620
      Kévin Petit authored
      
      
      In order for the symbol table in the ELF file to contain the size of
      functions written in assembly, it is necessary to report it to the
      assembler using the .size directive.
      
      To fulfil the above requirements, this patch introduces an 'endfunc'
      macro which contains the .endfunc and .size directives. It also adds
      a .func directive to the 'func' assembler macro.
      
      The .func/.endfunc have been used so the assembler can fail if
      endfunc is omitted.
      
      Fixes ARM-Software/tf-issues#295
      
      Change-Id: If8cb331b03d7f38fe7e3694d4de26f1075b278fc
      Signed-off-by: default avatarKévin Petit <kevin.petit@arm.com>
      8b779620
  6. 01 Apr, 2015 3 commits
  7. 31 Mar, 2015 6 commits
  8. 27 Mar, 2015 2 commits
    • Soby Mathew's avatar
      Remove the `owner` field in bakery_lock_t data structure · 548579f5
      Soby Mathew authored
      This patch removes the `owner` field in bakery_lock_t structure which
      is the data structure used in the bakery lock implementation that uses
      coherent memory. The assertions to protect against recursive lock
      acquisition were based on the 'owner' field. They are now done based
      on the bakery lock ticket number. These assertions are also added
      to the bakery lock implementation that uses normal memory as well.
      
      Change-Id: If4850a00dffd3977e218c0f0a8d145808f36b470
      548579f5
    • Soby Mathew's avatar
      Optimize the bakery lock structure for coherent memory · 1c9573a1
      Soby Mathew authored
      This patch optimizes the data structure used with the bakery lock
      implementation for coherent memory to save memory and minimize memory
      accesses. These optimizations were already part of the bakery lock
      implementation for normal memory and this patch now implements
      it for the coherent memory implementation as well. Also
      included in the patch is a cleanup to use the do-while loop while
      waiting for other contenders to finish choosing their tickets.
      
      Change-Id: Iedb305473133dc8f12126726d8329b67888b70f1
      1c9573a1
  9. 26 Mar, 2015 3 commits
  10. 24 Mar, 2015 1 commit
    • Sandrine Bailleux's avatar
      Add support for Juno r1 in the platform reset handler · 9454d316
      Sandrine Bailleux authored
      For Juno r0, the platform reset handler needs to:
       - Implement the workaround for defect #831273
       - Increase the L2 Data and Tag RAM latencies for Cortex-A57.
      
      Defect #831273 does not affect Juno r1. Also, the default value
      for the L2 Tag RAM latency for Cortex-A57 is suitable on Juno r1.
      The L2 Data RAM latency for Cortex-A57 still needs to be
      increased, though.
      
      This patch modifies the Juno platform reset handler to detect
      the board revision and skip the unnecessary steps on Juno r1.
      The behaviour on Juno r0 is unchanged.
      
      Change-Id: I27542917223e680ef923ee860900806ffcd0357b
      9454d316
  11. 20 Mar, 2015 1 commit
    • Achin Gupta's avatar
      Set group status of PPIs and SGIs correctly on GICv3 systems · 8cfc3fd2
      Achin Gupta authored
      On a GICv2 system, the group status of PPIs and SGIs is set in the GICD_IGROUPR0
      register. On a GICv3 system, if affinity routing is enabled for the non-secure
      state, then the group status of PPIs and SGIs should be set in the GICR_IGROUPR0
      register. ARM Trusted firmware sets the group status using the GICv2
      sequence. On a GICv3 system, if the group status of an interrupt is set to Group
      1 through a write to the GICD_IGROUPR0, then the GICR_IGROUPR0 is updated as
      well.
      
      The current sequence is incorrect since it first marks all PPIs and SGIs as
      Group 1. It then clears the bits in GICD_IGROUPR0 corresponding to secure
      interrupts to set their group status to Group 0. This operation is a no-op. It
      leaves the secure generic timer interrupt (#29) used by the TSP marked as Group
      1. This causes the interrupt to interfere with the execution of non-secure
      software. Once an interrupt has been marked as Group 1, the GICR_IGROUPR0 should
      be programmed to change its group status.
      
      This patch rectifies this issue by setting the group status of only the
      non-secure PPI and SGIs to Group 1 in the first place. GICD_IGROUPR0 resets to
      0. So secure interrupts are marked as Group 0 by default.
      
      Change-Id: I958b4b15f3e2b2444ce4c17764def36216498d00
      8cfc3fd2
  12. 19 Mar, 2015 1 commit
  13. 18 Mar, 2015 1 commit
  14. 17 Mar, 2015 8 commits