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Fix misra warnings in SMC and power mgmt code

Change-Id: Ia00eba2b18804e6498d935d33ec104953e0e5e03
Signed-off-by: Sathees Balya <sathees.balya@arm.com>

xlat: Fix checks in mmap_add() and mmap_add_ctx()

Commit 79621f00

 broke sgi575.

It is possible to have a region with 0 as value for the attributes. It
means device memory, read only, secure, executable. This is legitimate
if the code is in flash and the code is executed from there.

This is the case for SGI_MAP_FLASH0_RO, defined in the file
plat/arm/css/sgi/sgi_plat.c.

This problem is solved by checking both size and attributes in xlat v1.
In xlat v2, it is enough to check the granularity, as it can never be 0.

Change-Id: I7be11f1b0e51c4c2ffd560b4a6cdfbf15de2c276
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Remove some MISRA defects in common code

Remove incorrect tabulation in Makefile

Enable Multi Console API in AArch32

No functional changes.

Change-Id: I9638e02acb9b22eb794ebf45aad84348a710287e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

MAKE_DTB: dependencies on device tree source files

plat/marvell: Move BLE into the platform tree, minor fix in tools.

 Reclaim BL31 initialization code memory for runtime data

maintainers: Correct github username for nariman to npoushin

Ensure the flow through switch statements is clear

When attempting to compile TF-A with "SPD=something ARCH=aarch32", the
following error message is printed:

 Makefile:291: *** recipe commences before first target.  Stop.

This is because the call to the error function is indented using a tab
whereas it's not part of a rule's recipe. Replace the tab by spaces.

Change-Id: Ic9b603837a0e43f2f7070cb39137541c332365d2
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

As these rules depend on non-existing headers as well (likely copy &
pasted from fiptool), they never matched, and the built-in rules were
used. That led to random breakages when e.g. CPPFLAGS was suddenly
evaluated and contained invalid options.

For the stm32image, this reveals that we were relying on the built-in
rules by passing -D_GNU_SOURCE via CPPFLAGS, rather than using CFLAGS as
used in the local rule. Fix that as well.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

The BLE is the pre-TF-A boot stage required by Marvell Armada
BootROM for bringing up DRAM and allow the boot image copy to it.
Since this is not a standard boot level and only uses the TF-A
as a build environment, it was introduced out of source tree.
However it turns out that such remote location introduces additional
complexity to the upstream TF-A build process.
In order to simplify the build environment the BLE source folder
is relocated from the external repository to A8K platform directory.
The build documentation is updated accordingly.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

Map the initialization code for BL31 to overlap with the memory
required for the secondary cores stack. Once BL31 has been
initialized the memory can be remapped to RW data so that it can
be used for secondary cores stacks. By moving code from .text to
.text.init the size of the BL31 image is decreased by a page.

Split arm_common.ld.S into two linker scripts, one for tzc_dram
(arm_tzc_dram.ld.S) and one for reclaiming initialization code
(arm_reclaim_init.ld.S) so that platforms can chose which memory
regions they wish to include.

Change-Id: I648e88f3eda1aa71765744cf34343ecda9320b32
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>

Mark the GICv3, CCI and CCN code only used in Bl31 initialization
with __init to be reclaimed once no longer needed.

Change-Id: I3d77f36758450d9d1d87ecc60bc1c63fe4082667
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

Mark the xlat tables code only used in BL31 initialization as
__init to be reclaimed once no longer needed

Change-Id: I3106bfd994706a57c578624573bcfa525fbbd3c4
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

Mark the initialization functions found in the BL31 boot sequence
as __init so they can be reclaimed when no longer needed.

Change-Id: I687a89346419c7710ef5097feaa325d83c527697
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

Mark the initialization functions in BL31, such as context management,
EHF, RAS and PSCI as __init so that they can be reclaimed by the
platform when no longer needed

Change-Id: I7446aeee3dde8950b0f410cb766b7a2312c20130
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

This patch introduces a build flag "RECLAIM_INIT_CODE" to mark boot time
code which allows platforms to place this memory in an appropriate
section to be reclaimed later. This features is primarily targeted for
BL31. Appropriate documentation updates are also done.

Change-Id: If0ca062851614805d769c332c771083d46599194
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

Change-Id: Ibc91f119c99413ded59a9db3db918d22f0517bc1
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

Remove ARM_MAP_BL_ROMLIB memory region macro as it is now split
into two regions for code and data

Change-Id: Ic17b5b584933c196db29fe83051d7e0a8e92911c
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

Depending on the build flags it is possible that some of the memory
regions mapped in page table setup could have a size of 0. In this
case we simply want to do nothing but still wish to map the other
regions in the array. Therefore we cannot only use size == 0 as
the termination logic for the loop.

Since an attributes field with value 0 means that the region is
device memory, read only, secure and executable. Device memory
can't be executable, so this combination should never be used
and it is safe to use as a terminator value.

Therefore by changing the termination logic to use attributes
instead of size we prevent terminating the loop when we don't
intend to.

Change-Id: I92fc7f689ab08543497be6be4896dace2ed7b66a
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

Fix misra warnings in delay timer and console drivers

Fix static analysis defects

marvell: Continue migration to new APIs

plat/arm: Remove option ARM_BOARD_OPTIMISE_MEM

- Fix build issue
- Add initial memory parameters descriptors for BL2
- Migrate to image load V2

Basic build and run test passed on MacchiatoBin board.
Need to fix the service CPU (CM3) image load procesure and test
OPTEE functionality, which probably will require additional work.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

docs: Fixup filename and links to compatibility policy

Change-Id: I9d14faa7294578443233b84d5459fa7b62a30c07
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

This option makes it hard to optimize the memory definitions of all Arm
platforms because any change in the common defines must work in all of
them. The best thing to do is to remove it and move the definition to
each platform's header.

FVP, SGI and SGM were using the definitions in board_arm_def.h. The
definitions have been copied to each platform's platform_def.h. Juno
was already using the ones in platform_def.h, so there have been no
changes.

Change-Id: I9aecd11bbc72a3d0d7aad1ef9934d8df21dcfaf2
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Release docs updates for v2.0 release

Update the version to 2.0

Change-Id: Iaa5c586b65f0abdd4ddbdee4c73d07811a0aff49
Signed-off-by: Joanna Farley <joanna.farley@arm.com>

docs: Add platform compatibility policy document

Information regarding platform compatibility policy
is added to the documentation.

Change-Id: If9f2a11160f81354ee2c678f0fca9d67fc7366e6
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

docs: update for removal of deprecated interfaces.